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US 10,707,160 B2Granted
Electrical connectivity of die to a host substrate
AssigneeInfineon Technologies Americas Corp.
InventorRobert T. Carroll
Life of this patent
Estimating the term…
Abstract
According to example configurations herein, an apparatus comprises a die and a host substrate. The die can include a first transistor and a second transistor. A surface of the die includes multiple conductive elements disposed thereon. The multiple conductive elements on the surface are electrically coupled to respective nodes of the first transistor and the second transistor. Prior to assembly, the first transistor and second transistor are electrically isolated from each other. During assembly, the surface of the die including the respective conductive elements is mounted on a facing of the host substrate. Accordingly, a die including multiple independent transistors can be flipped and mounted to a respective host substrate such as printed circuit board, lead frame, etc.
Claims11
An apparatus comprising:
- a die comprising multiple field effect transistors including a first field effect transistor and a second field effect transistor, a surface of the die having a first gate node and second gate node disposed thereon, the first gate node electrically coupled to control the first field effect transistor, the second gate node electrically coupled to control the second field effect transistor;
- a host substrate, the surface of the die affixed to a face of the host substrate, the host substrate electrically connecting the first field effect transistor and the second field effect transistor in series;
- and
- wherein a first circuit path of the host substrate electrically couples a source node of the first field effect transistor to a drain node of the second field effect transistor;
- wherein the host substrate includes a second circuit path electrically connecting a drain node of the first field effect transistor to a first voltage reference node;
- and
- wherein the host substrate includes a third circuit path electrically connecting a source node of the second field effect transistor to a second voltage reference node;
- an inductor, a node of the inductor electrically coupled to the source node of the first field effect transistor and the drain node of the second field effect transistor via the first circuit path;
- wherein the first field effect transistor is a first lateral field effect transistor disposed in the die;
- and
- wherein the second field effect transistor is a second lateral field effect transistor disposed in the die;
- wherein the first field effect transistor is a control switch;
- and
- wherein the second field effect transistor is a synchronous switch;
- wherein the drain node of the first field effect transistor is disposed on the surface of the die;
- wherein the source node of the second field effect transistor is disposed on the surface of the die;
- wherein the first gate node is disposed on the surface of the die between the drain node of the first field effect transistor and the source node of the first field effect transistor;
- and
- wherein the second gate node is disposed on the surface of the die between the drain node of the second field effect transistor and the source node of the second field effect transistor.
16 more elements
A method comprising:
- receiving a die comprising multiple field effect transistors including a first field effect transistor and a second field effect transistor, a surface of the die having a first gate node and second gate node disposed thereon, the first gate node electrically coupled to control the first field effect transistor, the second gate node electrically coupled to control the second field effect transistor;
- affixing the surface of the die to a face of a host substrate, the host substrate electrically connecting the first field effect transistor and the second field effect transistor in series;
- wherein the first field effect transistor is a first lateral field effect transistor disposed in the die;
- and
- wherein the second field effect transistor is a second lateral field effect transistor disposed in the die;
- wherein affixing the surface of the die to the face of the host substrate electrically couples a source node of the first field effect transistor to a drain node of the second field effect transistor via a first circuit path on the host substrate;
- wherein affixing the surface of the die to the face of the host substrate electrically connects a drain node of the first field effect transistor to a first voltage reference node via a second circuit path on the host substrate;
- wherein affixing the surface of the die to the face of the host substrate electrically connects a source node of the second field effect transistor to a second voltage reference node via a third circuit path on the host substrate;
- wherein affixing the surface of the die to the face of the host substrate electrically couples a node of an inductor to the source node of the first field effect transistor and the drain node of the second field effect transistor via the first circuit path;
- wherein the first field effect transistor is a control switch;
- and
- wherein the second field effect transistor is a synchronous switch;
- wherein the drain node of the first field effect transistor is disposed on the surface of the die;
- wherein the source node of the second field effect transistor is disposed on the surface of the die;
- wherein the first gate node is disposed on the surface of the die between the drain node of the first field effect transistor and the source node of the first field effect transistor;
- and
- wherein the second gate node is disposed on the surface of the die between the drain node of the second field effect transistor and the source node of the second field effect transistor.
14 more elements
Dependencies are inferred from the claim text.