US 10,707,138 B1Granted

High yield package assembly technique

AssigneeXilinx, Inc.

InventorsShiying Xiong, Thao H. T. Vo, Felino E. Pagaduan, Qi Xiang, Xiao-Yu Li, Glenn O'Rourke

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Abstract

An integrated circuit (IC) chip package assembly apparatus and techniques for assembling IC chip packages are described. For example, a techniques for fabricating an IC package include (A) determining a first package assembly yield (PAY) across a first die pool comprising a first plurality of dies having a performance criteria within a first predefined range; (B) determining a second PAY across a second die pool comprising a second plurality of dies having a performance criteria within a second predefined range of performance criteria that is different than the first predefined range of performance criteria, the second plurality of dies comprising a portion of the first plurality of dies; and (C) generating a final assembly sequence in response to analyzing the first and second PAYs, the final assembly sequence comprising rules for combining dies in accordance with obtaining a higher of the first PAY and the second PAY.

Claims18

Dependent claims

A method for fabricating an integrated circuit (IC) package, the method comprising:

determining a first package assembly yield using a first assembly rule, for a predefined type of IC package having at least two or more dies, based on a predefined package performance criteria across a first die pool comprising a first plurality of dies, each of the first plurality of dies comprising the first die pool having a performance criteria within a first predefined range;
determining a second package assembly yield using a second assembly rule, for the predefined type of IC package, based on the predefined package performance criteria across a second die pool comprising a second plurality of dies, the second plurality of dies comprising a portion of the first plurality of dies, the second plurality of dies having a performance criteria within a second predefined range of performance criteria that is different than the first predefined range of performance criteria, wherein the first die pool has at least one die having a higher power consumption than a highest power consuming die of the second die pool;
and
generating a final assembly sequence, for the predefined type of IC package, in response to analyzing the second package assembly yield and the first package assembly yield, the final assembly sequence comprising rules for combining dies in accordance with obtaining a higher of the first package assembly yield and the second package assembly yield.

1 more element

A method for fabricating an integrated circuit (IC) package, the method comprising:

(A) from a die pool comprising a plurality of die, selecting a first predetermined number of dies for assembly into IC packages each having at least two or more dies, the first predetermined number of dies having an actual performance criteria closest to a first end of a range of performance criteria for the dies across the die pool, wherein the performance criteria is power consumption;
(B) determining that the first predetermined number of dies are acceptable for assembly into the IC packages in response to the actual performance criteria for the first predetermined number of dies satisfying a target performance criteria for the IC packages;
(C) selecting from the die pool, a replacement die to replace a selected die of the first predetermined number of dies for forming the IC packages in response to the actual performance criteria for the first predetermined number of dies not satisfying the target performance criteria for the IC packages, the replacement die and dies remaining from the first predetermined number of dies satisfying the target performance criteria for the IC packages, the replacement die having a power consumption greater than a power consumption of each of the dies remaining from the first predetermined number of dies satisfying the target performance criteria for the IC packages;
(D) removing dies combinable to form the IC packages at (A), (B) and (C) from the die pool;
and
(E) iteratively performing (A), (B), (C) and (D) until no more IC packages satisfying the target performance criteria can be formed from the die pool.

3 more elements

Dependencies are inferred from the claim text.