Gallium nitride NMOS on Si (111) co-integrated with a silicon PMOS

A method for forming a semiconductor device on a silicon substrate, the method comprising:

• forming a trench in the silicon substrate;
• forming a gallium nitride transistor in the trench;
• forming a first oxide layer over the gallium nitride transistor;
• forming a first polysilicon layer over the first oxide layer;
• and
• planarizing the first polysilicon layer to be coplanar with the silicon substrate;
• etching the first polysilicon layer to form a polysilicon fin;
• depositing a high-k dielectric over the polysilicon fin;
• depositing a second polysilicon layer over the high-k dielectric;
• selectively etching the second polysilicon layer and the high-k dielectric to form polysilicon islands and to expose the first polysilicon layer;
• forming insulating spaces on sidewalls of the polysilicon islands;
• forming a second oxide layer over the exposed first polysilicon layer and over the polysilicon islands;
• selectively etching the second oxide layer and the first polysilicon layer to expose a source electrode or drain electrode or gate electrode of the gallium nitride transistor;
• and
• depositing a metal via on the exposed source electrode or drain electrode or gate electrode.

A computing device, comprising:

• a processor;
• wherein the processor includes a transistor, comprising:
• a gallium nitride transistor in a trench in a substrate;
• a polysilicon layer over the gallium nitride transistor, the polysilicon layer coplanar with a top side of the substrate;
• a first electrically conductive structure over a source electrode of the gallium nitride transistor;
• a second electrically conductive structure over a gate electrode of the gallium nitride transistor and isolated from the first electrically conductive structure by a polysilicon layer;
• a first contact over the first electrically conductive structure;
• and
• a second contact over the second electrically conductive structure;
• the first contact separated from the second contact by at least one polysilicon island.

An apparatus, comprising:

• a support structure, the support structure comprising silicon;
• a gallium nitride transistor formed in a trench in the support structure;
• and
• a layer formed over the gallium nitride transistor, the layer coplanar with a top side of the support structure and comprising silicon or polysilicon.