Etch profile control of interconnect structures
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAllen Ke, Yi-Wei Chiu, Hung Jui Chang, Yu-Wei Kuo
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Abstract
A method of forming a semiconductor structure includes forming an etch stop layer on a substrate, forming a metal oxide layer over the etch stop layer, and forming an interlayer dielectric (ILD) layer on the metal oxide layer. The method further includes forming a trench etch opening over the ILD layer, forming a capping layer over the trench etch opening, and forming a via etch opening over the capping layer.
Claims20
A method of forming an interconnect structure, the method comprising:
- depositing an etch stop layer on a substrate;
- depositing a liner on the etch stop layer, the liner comprising an oxygen-doped carbide material;
- depositing a metal oxide layer on the liner;
- depositing an interlayer dielectric (ILD) layer on the metal oxide layer;
- depositing a low temperature oxide layer over the ILD layer;
- depositing a capping layer over the low temperature oxide layer, wherein the low temperature oxide layer is deposited at a temperature lower than that of the capping layer;
- and
- forming a via opening in the capping layer.
A method of forming a semiconductor structure, the method comprising:
- depositing an etch stop layer on a substrate;
- depositing a liner on the etch stop layer;
- depositing a metal carbide layer on the liner;
- depositing an interlayer dielectric (ILD) layer on the metal carbide layer, wherein the etch stop layer, the liner, the metal carbide layer, and the ILD layer form a vertical stack;
- forming a trench etch opening over the ILD layer, wherein forming the trench etch opening comprises:
- depositing a nitrogen-free dielectric layer on the ILD layer;
- and
- patterning a silicon-based layer and a nitride layer disposed on the nitrogen-free dielectric layer;
- depositing a capping layer over the trench etch opening;
- and
- forming a via etch opening over the capping layer.
A method, comprising:
- depositing a stack over a substrate;
- wherein the stack comprises:
- an etch stop layer disposed on the substrate;
- a liner layer on the etch stop layer;
- and
- a metal-containing layer disposed on the liner layer;
- depositing a dielectric layer on the stack;
- etching the dielectric layer and the stack to form an opening;
- disposing an organic layer over the dielectric layer;
- and
- depositing another stack over the organic layer, wherein the other stack comprises:
- an oxide layer;
- a silicon-based layer;
- and
- a capping layer, comprising silicon oxide, on the silicon-based layer.
Dependencies are inferred from the claim text.