Method of manufacturing wafer level chip scale package
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Hsiang Hu, Wei-Yu Chen, Hung-Jui Kuo, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
Life of this patent
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Abstract
A method of manufacturing a semiconductor device includes receiving a die including a top surface, a die pad exposed from the top surface, and sacrificial layer covering the top surface and the die pad; disposing the die on a substrate, disposing a molding surrounding the die and covering the sacrificial layer; removing a first portion of the molding and a portion of the sacrificial layer to expose a top surface of the sacrificial layer; removing a second portion of the molding to expose a sidewall of the sacrificial layer; and removing the sacrificial layer from the die.
Claims20
A method of manufacturing a semiconductor structure, comprising:
- receiving a die comprising a top surface, a die pad exposed from the top surface, and a sacrificial layer covering the top surface and the die pad;
- disposing the die on a substrate;
- disposing a molding surrounding the die and covering the sacrificial layer;
- removing a first portion of the molding and a portion of the sacrificial layer to expose a top surface of the sacrificial layer;
- removing a second portion of the molding to expose a sidewall of the sacrificial layer, wherein a top surface of the molding is at a level substantially same as the top surface of the die;
- and
- removing the sacrificial layer from the die.
A method of manufacturing a semiconductor structure, comprising:
- receiving a die comprising a top surface and a sacrificial layer covering the top surface of the die, wherein the sacrificial layer comprises polymer materials;
- disposing the die on a substrate;
- disposing a molding surrounding the die and exposing a top surface of the sacrificial layer;
- removing a portion of the molding to form a top surface of the molding, wherein a sidewall of the sacrificial layer is exposed from the top surface of the molding;
- removing the sacrificial layer from the die;
- and
- disposing a polymer over the die and the molding, wherein the polymer has a first top surface over the molding and a second top surface over the die, the first top surface of the polymer is substantially parallel with the top surface of the molding, the second top surface of the polymer is substantially parallel with the top surface of the die, and the top surface of the molding is at a level substantially same as the top surface of the die.
A method of manufacturing a semiconductor structure, comprising:
- receiving a first die and a second die, the first die comprising a first sacrificial layer disposed thereon and the second die comprising a second sacrificial layer disposed thereon, wherein the first die comprises a first height, the second die comprises a second height, and the first height is different from the second height;
- disposing the first die and the second die on a substrate;
- disposing a molding surrounding the first die and the second die, a first top surface of the molding being at a level substantially same as a top surface of the first sacrificial layer and a top surface of the second sacrificial layer;
- removing a first portion of the molding to expose a sidewall of the first sacrificial layer and a sidewall of the second sacrificial layer, wherein the removing the first portion of the molding further forms a curved surface adjacent to a periphery of a top surface of the first die and a second top surface of the molding at a level substantially higher than the top surface of the first die, wherein the second top surface of the molding is at a level substantially same as a top surface of the second die;
- and
- removing the first sacrificial layer from the first die and the second sacrificial layer from the second die.
Dependencies are inferred from the claim text.