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US 10,706,950 B1Granted
Testing for memory error correction code logic
AssigneeCadence Design Systems, Inc.
InventorsPatrick Gallagher, Steven Lee Gregor
Life of this patent
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Abstract
Systems and methods disclosed herein provide for improved testing of memory error correction code (“ECC”) logic with memory built-in self-test (“MBIST”). Embodiments provide for a masking element to inject one or more faults into the ECC logic during at least one of a manufacturing test (“MFGT”) and a power-on-self-test (“POST”), wherein, based on the injected faults, it can be determined if the ECC logic contains any errors.
Claims20
A memory built-in self-test (“MBIST”) diagnostics system, comprising;
- a memory, wherein the memory includes a physical memory module and a logical memory module, wherein the logical memory module includes error correction code (“ECC”) logic further comprising:
- an ECC encoder that receives a first set of data, manipulates the first set of data, and provides the manipulated first set of data to the physical memory module, and
- an ECC checker that receives a second set of data from a masking element, manipulates the second set of data and outputs the manipulated second set of data;
- a sequence iterator unit (“SIU”) that is configurable to provide the first set of data to the ECC encoder, wherein one or more faults are injected into the first set of data received by the ECC encoder;
- wherein the masking element is configurable to receive the manipulated first set of data from the physical memory module and inject one or more faults into the manipulated first set of data to generate the second set of data received by the ECC checker;
- and
- a data compare unit, wherein the data compare unit is configured to (i) receive the manipulated second set of data from the ECC checker and (ii) determine if the logical memory module includes an error by comparing the manipulated second set of data from the ECC checker and a set of expected data provided by the SIU.
4 more elements
A diagnostics method for memory built-in self-test (“MBIST”), the method comprising:
- providing, with a sequence iterator unit (“SIU”), a first set of data, wherein one or more faults are injected into the first set of data;
- manipulating, with an error correction code (“ECC”) encoder of a logical memory module, the first set of data;
- injecting, with a masking element, one or more faults into the manipulated first set of data received, wherein the masking element generates a second set of data to be received by an ECC checker of the logical memory module;
- generating, with the ECC checker of the logical memory module, a manipulated second set of data based on the injected one or more faults;
- receiving, with a data compare unit, the the manipulated second set of data from the ECC checker and a set of expected data from the SIU;
- and
- determining, with the data compare unit, if the logical memory module includes an error by comparing the manipulated second set of data the expected set of data.
4 more elements
Dependencies are inferred from the claim text.