Memory controller for controlling memory device based on erase state information and method of operating the memory controller

A memory controller for controlling a memory operation on a memory cell array including a plurality of memory cells, the memory controller comprising:

• an erase information collector configured to receive erase state information about the plurality of memory cells from the memory cell array, classify the plurality of memory cells into a first group, a second group, and a third group based on the erase state information, and output first information corresponding to the first group, second information corresponding to the second group, and third information corresponding to the third group;
• and
• an erase state control encoder configured to receive the first information, the second information, and the third information from the erase information collector, set target states including at least one predetermined state from among a plurality of program states, encode data to be programmed to memory cells included in the first group based on the first information and the target states, encode data to be programmed to memory cells included in the second group based on the second information, and encode data to be programmed to memory cells included in the third group based on the third information,
• wherein the erase state control encoder is configured to perform bit mapping corresponding to the plurality of program states, based on the target states.

A memory system comprising:

• a memory device comprising a memory cell array corresponding to a three dimensional vertical NAND flash memory;
• a memory controller configured to control a memory operation on the memory cell array;
• and
• a target state controller configured to classify a plurality of memory cells in an erase state into a plurality of groups, based on erase state information about the plurality of memory cells in the erase state, set target states for at least some memory cells from among memory cells included in at least one of the plurality of groups to at least one predetermined state from among a plurality of program states, perform error correction code (ECC) encoding based on the set target states, and program the at least some memory cells in the erase state included in at least one of the plurality of groups to program states based on the ECC encoded data, the program states being from among the plurality of program states other than the set target states.