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US 10,706,939 B2Granted
Memory device, memory system, and method of operating memory device
AssigneeSK hynix Inc.
InventorJong Wook Kim
Life of this patent
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Abstract
Provided herein may be a memory device, a memory system, and a method of operating the memory device. When all of normal operation loops associated with a program operation or an erase operation of a memory cell fail, a retry operation of repeating at least one of the normal operation loops is performed in consideration of the degraded state of at least one of a source select transistor, a drain select transistor, and a dummy cell.
Claims25
A method of operating a memory device, the method comprising:
- performing a normal operation including normal operation loops so that a selected memory cell in a selected cell string has a target threshold voltage, wherein the normal operation loops are performed based on an operating voltage that is sequentially increased by a step voltage from a first operating pulse to a k-th operating pulse;
- and
- performing a first retry operation of repeating at least one of the normal operation loops when the selected memory cell does not reach the target threshold voltage after a k-th normal operation loop for the k-th operating pulse of the normal operation,
- wherein at least one of a first voltage setting condition for a source select line coupled to a source select transistor of the selected cell string, a second voltage setting condition for a drain select line coupled to a drain select transistor of the selected cell string, and a third voltage setting condition for a dummy word line coupled to a dummy cell of the selected cell string is controlled in the first retry operation in a way different from that in the normal operation.
1 more element
A method of operating a memory device, the method comprising:
- performing a normal operation including normal operation loops so that a selected memory cell in a selected cell string has a target threshold voltage, wherein the normal operation loops are performed based on an operating voltage that is sequentially increased by a step voltage from a first operating pulse to a k-th operating pulse;
- resetting a threshold voltage of at least one of a source select transistor of the selected cell string, a drain select transistor of the selected cell string, and a dummy cell of the selected cell string when the selected memory cell does not reach the target threshold voltage after a k-th normal operation loop for the k-th operating pulse of the normal operation;
- and
- performing a first retry operation of repeating at least one of the normal operation loops after the threshold voltage has been reset.
1 more element
An operating method of a memory device, the method comprising:
- performing a normal program operation to a memory cell so that the memory cell has a target threshold voltage;
- and
- performing, when the memory cell does not reach the target threshold voltage after the normal program operation, a retry program operation to the memory cell by increasing one or more among voltages applied to the source select line, the drain select line and the dummy word line for the memory cell.
An operating method of a memory device, the method comprising:
- performing a normal program operation to a memory cell so that the memory cell has a target threshold voltage;
- resetting, when the memory cell does not reach the target threshold voltage after the normal program operation, threshold voltages of one or more among a source select transistor, a drain select transistor and a dummy cell for the memory cell;
- and
- performing a retry program operation to the memory cell.
1 more element
An operating method of a memory device, the method comprising:
- performing a normal erase operation to a memory cell so that the memory cell has a target threshold voltage;
- and
- performing, when the memory cell does not reach the target threshold voltage after the normal erase operation, a retry erase operation to the memory cell by applying a precharge voltage and a select voltage for a longer duration than the normal erase operation.
An operating method of a memory device, the method comprising:
- performing a normal erase operation to a memory cell so that the memory cell has a target threshold voltage;
- resetting, when the memory cell does not reach the target threshold voltage after the normal erase operation, threshold voltages of one or more among a source select transistor, a drain select transistor and a dummy cell for the memory cell;
- and
- performing a retry erase operation to the memory cell.
1 more element
Dependencies are inferred from the claim text.