Memory with symmetric read current profile and read method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYuhsiang Chen, Shao-Yu Chou, Chun-Hao Chang, Min-Shin Wu, Yu-Der Chih
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Abstract
Memories with symmetric read current profiles are provided. A memory includes a first memory array formed by a plurality of memory cells, a second memory array formed by a plurality of memory cells, and a read circuit. The read circuit includes an output buffer. The output buffer is configured to simultaneously obtain first data from the first memory array and second data from the second memory array according a first address signal, and selectively provide the first data or the second data as an output according to a control signal. Binary representation of the first data is complementary to that of the second data.
Claims20
A memory, comprising:
- a first memory array formed by a plurality of memory cells;
- a second memory array formed by a plurality of memory cells;
- and
- a read circuit, comprising:
- an output buffer configured to simultaneously obtain first data from the first memory array and second data from the second memory array according a first address signal, and selectively provide the first data or the second data as an output according to a control signal,
- wherein binary representation of the first data is complementary to that of the second data.
A memory, comprising:
- a first memory array formed by a plurality of memory cells;
- a second memory array formed by a plurality of memory cells;
- and
- a read circuit, comprising:
- a sensing circuit configured to provide a first sensing signal according to a reference signal and first data from the first memory array, and a second sensing signal according to the reference signal and second data from the second memory array;
- an exchange unit configured to selectively provide one of the first sensing signal or the second sensing signal as a first signal and selectively provide the other as a second signal according to a control signal;
- a random number generator configured to generate the control signal;
- and
- an output buffer configured to selectively provide the first signal or the second signal as an output according to the control signal,
- wherein binary representation of the first data is complementary to that of the second data.
A read method for a memory, comprising:
- storing complementary data into a first memory array and a second memory array of the memory;
- obtaining first data from the first memory array and second data from the second memory array according an address signal;
- and
- selectively providing the first data or the second data as an output according to a control signal,
- wherein a first read current of the memory for providing the first data as the output is close to a second read current of the memory for providing the second data as the output.
Dependencies are inferred from the claim text.