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US 10,706,616 B2Granted
Fragment compression for coarse pixel shading
AssigneeIntel Corporation
InventorsPrasoonkumar Surti, Abhishek R. Appu, Subhajit Dasgupta, Srivallaba Mysore, Michael J. Norris, Vasanth Ranganathan, Joydeep Ray
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Abstract
One embodiment provides for a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel processing pipeline and a render cache to store coarse pixel data for input to or output from pixel processing pipeline.
Claims20
A graphics processing unit comprising:
- a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel pipeline;
- and
- a render cache to store coarse pixel data for input to and output from a post-shader pixel processing unit of the pixel pipeline, the render cache including a merge unit to merge a pixel quad read from memory into a coarse pixel, the coarse pixel to be processed by the post-shader pixel processing unit.
A method of coarse pixel processing on a graphics processing unit, the method comprising:
- performing a coarse pixel shading operation on a coarse pixel quad fragment via a parallel processing cluster to generate a coarse pixel quad;
- outputting the coarse pixel quad to a post-shader pixel pipeline;
- performing coarse pixel operations on multiple coarse pixels within the coarse pixel quad via a pixel processing unit of the post-shader pixel pipeline;
- writing, via the post-shader pixel pipeline, a processed coarse pixel quad to a render cache;
- and
- evicting the processed coarse pixel quad from the render cache as a coarse pixel.
3 more elements
A data processing system comprising:
- a memory device to store a render target;
- and
- a graphics processing unit comprising a processing cluster to perform coarse pixel shading and output shaded coarse pixels for processing by a pixel pipeline, a render cache to store coarse pixel data processed by and output from a post-shader pixel processing unit of the pixel pipeline, and a graphics processor cache to store coarse pixel data evicted from the render cache as coarse pixels.
Dependencies are inferred from the claim text.