System and method for generation of wafer inspection critical areas

A system for generating one or more wafer inspection recipes for wafer inspection comprising:

• an inspection sub-system;
• and
• a controller communicatively coupled to the inspection sub-system, wherein the controller includes one or more processors configured to execute a set of program instructions stored in memory, wherein the program instructions are configured to cause the one or more processors to:
• receive one or more sets of wafer data, wherein the one or more sets of wafer data include one or more layers, wherein the one or more layers include one or more shapes;
• identify one or more primitives from the one or more shapes;
• classify each of the one or more primitives as a particular primitive type;
• identify one or more primitive characteristics for each of the one or more primitives;
• generate a primitive database of the one or more primitives, wherein the primitive database includes the particular primitive type and the one or more primitive characteristics for each of the one or more primitives;
• generate one or more rules based on the primitive database;
• receive one or more sets of design data;
• apply the one or more rules to the one or more sets of design data to identify one or more critical areas, wherein the one or more rules associate the one or more of primitives in one or more patterned arrangements in the one or more sets of design data to one or more potential failure sites, wherein the one or more potential failure sites include one or more potential sites of electrical intent failure;
• generate one or more wafer inspection recipes for the inspection sub-system, wherein the one or more wafer inspection recipes include the one or more critical areas, wherein a particular critical area includes the one or more potential failure sites;
• and
• transmit the inspection recipe to the inspection sub-system for inspection of one or more wafers.