Uniform predicates in shaders for graphics processing units

An apparatus for processing data, the apparatus comprising:

• a memory configured to store a first set of instructions;
• and
• a first processor configured to:
• determine that a plurality of threads of a warp in a second processor are to execute a same branch of a first set of instructions by determining that the plurality of threads of the warp for the first set of instructions uses a same set of constants or by determining that the plurality of threads of the warp for the first set of instructions uses data from a uniform general purpose register (uGPR) that applies to all threads of the warp;
• and
• send an indication, in response to the determination, to the second processor;
• and
• the second processor in communication with the first processor, the second processor configured to:
• receive the indication that the plurality of threads of the warp in the second processor are to execute the same branch in the first set of instructions;
• store one predicate bit in a register, wherein the predicate bit applies to all of the plurality of threads in the warp;
• and
• execute a portion of the first set of instructions in accordance with the predicate bit.

An apparatus for processing data, the apparatus comprising:

• means for determining that a plurality of threads of a warp in a graphics processing unit (GPU) are to execute a same branch of a first set of instructions by determining that the plurality of threads of the warp for the first set of instructions uses a same set of constants or by determining that the plurality of threads of the warp for the first set of instructions uses data from a uniform general purpose register (uGPR) that applies to the plurality of threads of the warp;
• means for sending an indication, in response to the determination, that the plurality of threads of the warp in the GPU are to execute the same branch in the first set of instructions;
• means for receiving the indication that the plurality of threads of the warp in the GPU are to execute the same branch in the first set of instructions;
• means for storing one predicate bit in a memory, wherein the predicate bit applies to all of the plurality of threads in the warp;
• and
• means for executing a portion of the first set of instructions in accordance with the predicate bit.

A non-transitory computer-readable storage medium storing instructions that, when executed, causes one or more processor to:

• determine that a plurality of threads of a warp in a graphics processing unit (GPU) are to execute a same branch of a first set of instructions by determining that the plurality of threads of the warp for the first set of instructions uses a same set of constants or by determining that the plurality of threads of the warp for the first set of instructions uses data from a uniform general purpose register (uGPR) that applies to the plurality of threads of the warp;
• send an indication, in response to the determination, that the plurality of threads of the warp in the GPU are to execute the same branch in the first set of instructions;
• receive the indication that the plurality of threads of the warp in the GPU are to execute the same branch in the first set of instructions;
• store one predicate bit in a memory, wherein the predicate bit applies to all of the plurality of threads in the warp;
• and
• execute a portion of the first set of instructions in accordance with the predicate bit.