Computer processing during simulation of a circuit design
AssigneeXilinx, Inc.
InventorsDavid Van Campenhout, Avinash Somalinga Suresh, Ali Behboodian
Life of this patent
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Abstract
Approaches for simulating and processing a circuit design involve recognizing by a design processing tool a replaceable subsystem in a circuit design having multiple blocks. The replaceable subsystem includes a subset of the blocks. The design tool converts the subset of blocks into an executable program and schedules activation of blocks of the circuit design other than the subset of blocks during simulation of the circuit design. The scheduled blocks are activated during simulation according to the scheduling, and activation of the subset of the plurality of blocks is bypassed during simulation with a call to the executable program.
Claims16
A method comprising:
- recognizing by a design processing tool executing on a computer system, a replaceable subsystem in a circuit design that includes a plurality of blocks, the replaceable subsystem including a subset of the plurality of blocks;
- converting the subset of the plurality of blocks into an executable program by the design processing tool;
- instantiating in the circuit design after recognizing the replaceable subsystem, a master block connected to receive inputs of and provide outputs of the replaceable subsystem, wherein the master block is configured to call the executable program;
- instantiating in the circuit design a slave block connected to receive output of the replaceable subsystem and connected to provide input to the master block;
- scheduling activation of blocks of the circuit design other than the subset of blocks during simulation of the circuit design by the design processing tool;
- activating scheduled blocks during simulation according to the scheduling;
- and
- bypassing activation of the subset of the plurality of blocks during simulation with a call to the executable program.
A system comprising:
- a processor;
- a memory arrangement coupled to the processor and configured with instructions that when executed by the processor cause the processor to execute a circuit design processing tool that performs operations including:
- recognizing, a replaceable subsystem in a circuit design that includes a plurality of blocks, the replaceable subsystem including a subset of the plurality of blocks;
- converting the subset of the plurality of blocks into an executable program;
- instantiating in the circuit design after recognizing the replaceable subsystem, a master block connected to receive inputs of and provide outputs of the replaceable subsystem, wherein the master block is configured to call the executable program;
- instantiating in the circuit design a slave block connected to receive output of the replaceable subsystem and connected to provide input to the master block;
- scheduling activation of blocks of the circuit design other than the subset of blocks during simulation of the circuit design;
- activating scheduled blocks during simulation according to the scheduling;
- and
- bypassing activation of the subset of the plurality of blocks during simulation with a call to the executable program.
Dependencies are inferred from the claim text.