Configurable logic platform with multiple reconfigurable regions

A method for operating a configurable hardware platform comprising reconfigurable logic, the method comprising:

• loading host logic on a first region of the reconfigurable logic so that the configurable hardware platform performs operations of the host logic, the host logic including a host interface and a control plane function enforcing restricted access for transactions from the host interface over a physical interconnect;
• loading a first application logic design on a second region of the reconfigurable logic in response to receiving a first transaction at the host interface, the first transaction satisfying access criteria of the control plane function;
• loading a second application logic design on a third region of the reconfigurable logic in response to receiving a second transaction at the host interface, the second transaction satisfying access criteria of the control plane function;
• and
• using the host logic to arbitrate between resources used by each of the first application logic design and the second application logic design when transmitting information from the host interface, wherein the host logic enforces an apportionment of bandwidth for data transfers over the physical interconnect generated by the first and second application logic designs.