Programming and controlling compute units in an integrated circuit

An integrated circuit, comprising:

• a plurality of compute units configured to perform operations offloaded by a host processor;
• a compute unit interrupt circuit configured to, in response to receiving an interrupt from a selected compute unit of the plurality of compute units indicating that the selected compute unit is finished processing, signal that the selected compute unit is finished processing;
• a compute unit completion register configured to generate an interrupt in response to the signal from the compute unit interrupt circuit;
• a controller configured to, in response to the interrupt from the compute unit completion register, determine a selected command of a plurality of commands offloaded from the host processor was executed by the selected compute unit and output the selected command;
• a command completion register configured to generate an interrupt to the host processor indicating that the selected command of the plurality of commands has finished processing;
• and
• wherein the selected compute unit is determined from the plurality of compute units to execute the selected command by comparing a first list, from within the selected command, specifying one or more of the plurality of compute units capable of executing the selected command to a second list specifying compute units of the plurality of compute units that are idle to determine a common compute unit as the selected compute unit.

A method, comprising:

• in response to a notification from a host processor indicating availability of a new command within a command queue, generating an interrupt to a controller;
• the controller, in response to the interrupt, determining a selected compute unit that is idle from a plurality of compute units to execute the new command;
• the controller notifying a compute unit direct memory access circuit of the selected compute unit and the new command in the command queue;
• providing, using the compute unit direct memory access circuit, the new command to the selected compute unit;
• generating an interrupt to the host processor indicating that the new command completed execution in the selected compute unit;
• wherein the determining a selected compute unit from the plurality of compute units includes:
• reading a first list specifying one or more of the plurality of compute units capable of executing the new command from within the new command;
• and
• comparing the first list to a second list specifying compute units of the plurality of compute units that are idle to determine a common compute unit as the selected compute unit.