Protocol including timing calibration between memory request and data transfer
AssigneeRambus Inc.
InventorsFrederick A. Ware, Holden Jessup
Life of this patent
Estimating the term…
Abstract
The described embodiments provide a system for controlling an integrated circuit memory device by a memory controller. During operation, the system sends a memory-access request from the memory controller to the memory device using a first link. After sending the memory-access request, the memory controller sends to the memory device a command that specifies performing a timing-calibration operation for a second link. The system subsequently transfers data associated with the memory-access request using the second link, wherein the timing-calibration operation occurs between sending the memory-access request and transferring the data associated with the memory-access request.
Claims20
A method for controlling a non-volatile integrated circuit (IC) memory device by a memory controller, the method comprising:
- sending a read command from the memory controller to the non-volatile IC memory device to access read data from storage during an access time interval, the access time interval representing a time to access the read data corresponding to the read command;
- after sending the read command, sending to the non-volatile IC memory device a calibration command that specifies performing a read timing-calibration operation associated with the read command, the read timing-calibration operation to adjust a first receive timing phase relationship between read data received at the memory controller and a receive timing reference to an adjusted receive phase relationship, the read-timing calibration operation performed during the access time interval;
- and
- receiving the read data from the non-volatile IC memory device in accordance with the adjusted receive phase relationship.
A memory controller, comprising:
- a first interface to communicate read commands from the memory controller to a non-volatile integrated circuit (IC) memory device to access read data from storage during an access time interval, the access time interval representing a time to access the read data corresponding to the read command;
- a second interface to receive read data associated with the read commands between the memory controller and the non-volatile IC memory device;
- wherein after sending a read command, the memory controller is to:
- send to the non-volatile IC memory device a command that specifies performing a read timing-calibration operation through the first interface, the read timing-calibration operation to adjust a receive timing phase relationship between read data received at the memory controller and a read timing reference, the read timing-calibration operation performed during the access time interval and
- receive read data associated with the read command through the second interface in accordance with the adjusted receive timing phase relationship.
A method for controlling a non-volatile integrated circuit (IC) memory device by a memory controller, the method comprising:
- dispatching a read command from the memory controller to the non-volatile IC memory device to access read data from storage during an access time interval, the access time interval representing a time to access the read data corresponding to the read command;
- sending to the non-volatile IC memory device a command that specifies adjusting a receive timing phase relationship between read data received at the memory controller and a receive timing reference, the adjusting a receive timing phase relationship performed during the access time interval;
- and
- receiving the read data from the non-volatile IC memory device in accordance with the adjusted receive timing phase relationship.
Dependencies are inferred from the claim text.