Enhanced address compaction
AssigneeSeagate Technology LLC
InventorsSundararajan Sankaranarayanan, Erich Franz Haratsch
Life of this patent
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Abstract
An apparatus may include a circuit configured to determine a first encoded address is in a bitwise range of addresses, determine a first physical address in a storage memory from the first encoded address using bitwise mapping and retrieve first data from the first physical address in the storage memory. The circuit may further be configured to determine a second encoded address is in an offset linear range of addresses, determine a second physical address in the storage memory from the second encoded address using offset linear mapping and write second data to the second physical address in the storage memory.
Claims20
A data storage controller apparatus for decoding logical addresses to determine corresponding physical data storage locations comprising:
- a circuit configured to:
- determine a first encoded logical address is in a first range of addresses;
- when the first encoded logical address is within the first range of addresses, determine a first physical address in a storage memory from the first encoded logical address using a bitwise mapping scheme, which can determine a physical address location of the storage memory based on a bitwise encoded logical address;
- retrieve first data from the first physical address in the storage memory;
- determine a second encoded logical address is in a second range of addresses;
- determine a second physical address in the storage memory from the second encoded logical address using an offset linear mapping scheme, which can determine a physical address location based on offsets of linear mapped sections of physical storage locations of the storage memory;
- and
- write second data to the second physical address in the storage memory.
A system comprising:
- a storage controller circuit configured to:
- determine if a first encoded address is in a first range of addresses;
- determine a first physical address in a storage memory from the first encoded address using offset linear mapping when the first encoded address is within the first range of addresses;
- determine if a second encoded address is in a second range of addresses;
- determine a second physical address in the storage memory from the second encoded address using bitwise mapping when the second encoded address is within the second range of addresses;
- and
- a read/write channel circuit configured to:
- retrieve first data from the first physical address in the storage memory in response to a read command received at the storage controller circuit that corresponds to the first encoded address;
- and
- write second data to the second physical address in the storage memory in response to a write command received at the storage controller circuit that corresponds to the second encoded address.
A method of encoding logical data addresses corresponding to physical data locations of a storage memory, comprising:
- receiving, at a storage controller circuit, information related to the storage memory;
- determining, by the storage controller circuit, based on the field information, whether to utilize enhanced compaction addressing, where enhanced compaction addressing includes utilizing a first portion of logical data addresses encoded using a bitwise address mapping scheme while another portion of the logical data addresses are encoded using an offset linear mapping scheme;
- when the determination determines to use enhanced compaction addressing, utilizing, by the storage controller circuit, enhanced compaction addressing in controlling the logical data addressing of the storage memory;
- and
- when the determination does not determine to use enhanced compaction addressing, utilizing, by the storage controller circuit, bitwise addressing in controlling the logical data addressing of the storage memory.
Dependencies are inferred from the claim text.