Scheduling that determines whether to remove a dependent micro-instruction from a reservation station queue based on determining cache hit/miss status of one ore more load micro-instructions once a count reaches a predetermined value

A scheduler device for micro-instructions comprising:

• a reservation station queue;
• a release circuit coupled to the reservation station queue;
• and
• a first qualifier, coupled to the release circuit, detecting a write-back signal broadcasted by a second qualifier, determining whether a value of a first load-detection counting logic is to be synchronized with a value of a second load-detection counting logic carried by the write-back signal according to content of the write-back signal, determining whether execution statuses of all of the load micro-instructions are cache hit when the synchronized value of the first load-detection counting logic reaches a first predetermined value, and driving the release circuit to remove the first micro-instruction in the reservation station queue when the execution statuses of all of the load micro-instructions are cache hit and the first micro-instruction has been dispatched to an arithmetic and logic unit for execution,
• wherein the first qualifier is associated with the first micro-instruction, the first micro-instruction depends on a second micro-instruction, and the second micro-instruction depends on one or a plurality of load micro-instructions executed by one or a plurality of load execution units.