Mode-selectable processor for execution of a single thread in a first mode and plural borrowed threads in a second mode
AssigneeThe Regents of the University of Michigan
InventorsSeyedamirhossein Mirhosseininiri, Thomas Friedrich Wenisch
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Abstract
A data processing system includes a multithreaded processor to execute a plurality of selected program threads in parallel. A mode-selectable processor is coupled to the multithreaded processor and executes in either a first mode or a second mode. In the first mode program instructions from a single thread are executed. In the second mode, which is selected when the single program thread is inactive, program instructions forming a plurality of borrowed threads are executed. These borrowed threads are taken from a queue of candidate program threads which is managed by the multithreaded processor.
Claims20
Apparatus for processing data comprising:
- a multithreaded processor to execute, in parallel, program instructions from a plurality of selected program threads selected from among a queue of a plurality of candidate program threads awaiting execution and managed by said multithreaded processor;
- and
- a mode-selectable processor coupled to said multithreaded processor to execute program instructions in a selected mode from among a plurality of modes comprising:
- a first mode in which program instructions from a single program thread are executed;
- and
- a second mode, selected when said single program thread is inactive, in which program instructions from a plurality of borrowed program threads from said queue are executed in parallel,
- wherein said multithreaded processor comprises a multithreaded-processor cache memory, said mode-selectable processor comprises a mode-selectable-processor cache memory, and said mode-selectable processor is configured to switch from using said mode-selectable-processor cache memory when operating in said first mode to using said multithreaded-processor cache memory when operating in said second mode.
Apparatus for processing data comprising:
- multithreaded processing means for executing, in parallel, program instructions from a plurality of selected program threads selected from among a queue of a plurality of candidate program threads awaiting execution and managed by said multithreaded processing means;
- and
- a mode-selectable processing means coupled to said multithreaded processing means to execute program instructions in a selected mode from among a plurality of modes comprising:
- a first mode in which program instructions from a single program thread are executed;
- and
- a second mode, selected when said single program thread is inactive, in which program instructions from a plurality of borrowed program threads from said queue are executed in parallel,
- wherein said multithreaded processing means comprises a multithreaded-processor cache means, said mode-selectable processing means comprises a mode-selectable-processor cache memory, and said mode-selectable processing means is configured to switch from using said mode-selectable-processor cache means when operating in said first mode to using said multithreaded-processor cache means when operating in said second mode.
A method of processing data comprising:
- using a multithreaded processor to execute, in parallel, program instructions from a plurality of selected program threads selected from among a queue of a plurality of candidate program threads awaiting execution and managed by said multithreaded processor;
- and
- using a mode-selectable processor coupled to said multithreaded processor to execute program instructions in a selected mode from among a plurality of modes comprising:
- a first mode in which program instructions from a single program thread are executed;
- and
- a second mode, selected when said single program thread is inactive, in which program instructions from a plurality of borrowed program threads from said queue are executed in parallel,
- wherein said multithreaded processor comprises a multithreaded-processor cache memory, said mode-selectable processor comprises a mode-selectable-processor cache memory, and said mode-selectable processor switches from using said mode-selectable-processor cache memory when operating in said first mode to using said multithreaded-processor cache memory when operating in said second mode.
Dependencies are inferred from the claim text.