Method and system for detection of thread stall

A method of checking for a stall condition in a processor comprising:

• inserting an inline instruction sequence into a thread, the inline instruction sequence configured to be processed by the processor in sequence with the thread and wherein the inline instruction sequence is further configured to:
• read a result from a timing register during processing of a first instruction in the inline instruction sequence and store the result in a first general purpose register, wherein the timing register functions as a timer for the processor;
• and
• read a result from the timing register during processing of a second instruction in the inline instruction sequence and store the result in a second general purpose register, wherein the second instruction is the next consecutive instruction after the first instruction;
• executing the thread containing the inline instruction sequence;
• comparing the result in the first general purpose register with the result in the second general purpose register;
• and
• using the comparison of the result in the first general purpose register with the result in the second general purpose register to determine if there is a stall condition in the processor.

A computer program product for checking for stalls in a pipeline of a processor, the computer program product comprising a computer readable storage medium having program instructions embedded therewith, the program instructions executable by a processor to cause the processor to perform a method, the method comprising:

• inserting into a thread of instructions to be executed by the processor an in-line instruction sequence;
• executing the thread of instructions containing the in-line instruction sequence, wherein the inline instruction is executed by the processor in sequence with the thread instructions, the inline execution comprising:
• reading a result from a timebase register and storing the result in a first register during processing of a first instruction of the thread of instructions;
• reading the result from the timebase register and storing the result in a second register during processing of a second, consecutive instruction of the thread of instructions;
• determining a difference in value between the second register and the first register, and comparing the difference to a threshold, wherein the comparison is a check on whether there is a stall in the pipeline of the processor.