Memory interface, memory controller having the memory interface, and memory system having the memory controller
AssigneeSK hynix Inc.
InventorsSung Kwan Hong, Ik Sung Oh
Life of this patent
Estimating the term…
Abstract
There are provided a memory interface, a command queue controller configured to determine an execution order of normal commands and a suspend command; a command time controller configured to receive the normal commands, and output command and time information by providing a corresponding additional operation time to each of the normal commands; a command time manager configured to match the command and time information to each of the normal commands to be stored therein, and output an end signal; and an input/output interface configured to receive the normal commands and the suspend command, and transmit the normal commands and the suspend command to a memory device through a channel.
Claims19
A memory interface comprising:
- a command queue controller configured to determine an execution order of normal commands and a suspend command;
- a command time controller configured to receive the normal commands, and output command and time information by providing a corresponding additional operation time to each of the normal commands;
- a command time manager configured to match the command and time information to each of the normal commands to be stored therein, and output an end signal after the additional operation time matched to each of the normal commands elapses when the suspend command is received;
- and
- an input/output interface configured to receive the normal commands and the suspend command, and transmit the normal commands and the suspend command to a memory device through a channel.
A memory controller comprising:
- a central processing unit configured to generate a normal command and a suspend command in response to a request from a host;
- and
- a memory interface configured to transmit the normal command or the suspend command to a memory device,
- wherein the memory interface:
- when the normal command is received, provides an additional operation time to the normal command and transmits the normal command to the memory device;
- and
- when the suspend command is received during execution of the normal command, executes the normal command for the additional operation time and then transmits the suspend command to the memory device.
A memory system comprising:
- a memory device configured to store data;
- and
- a memory controller configured to generate a normal command or a suspend command in response to a request from a host, and transmit the normal command or the suspend command to the memory device through a channel,
- wherein the memory controller:
- provides an additional operation time to the normal command and then transmits the normal command to the memory device, when the normal command is generated;
- and
- delays the suspend command for the additional operation time matched to the normal command and then transmits the suspend command to the memory device, when the suspend command is generated.
Dependencies are inferred from the claim text.