Integrated circuit device and high bandwidth memory device
AssigneeSamsung Electronics Co., Ltd.
InventorsJong Pil Son, Woo Yeong Cho
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Abstract
An integrated circuit device and a high bandwidth memory device are disclosed. The integrated circuit device includes a plurality of warpage detection sensors at a plurality of different positions, respectively, and electrically connected in series. Each of the plurality of warpage detection sensors is configured to generate a clock signal with a period that is based on a resistance that varies based on a pressure at a corresponding position, and to generate digital data by performing a counting operation in response to the clock signal.
Claims20
An integrated circuit device, comprising:
- a plurality of warpage detection sensors at a plurality of different positions, respectively, and electrically connected in series,
- wherein each of the plurality of warpage detection sensors is configured to generate a clock signal with a period that is based on a resistance that varies based on a pressure at a corresponding one of the plurality of different positions, and is further configured to generate first digital data by performing a first counting operation in response to the clock signal and to generate second digital data by performing a second counting operation in response to the clock signal.
An integrated circuit device, comprising:
- a plurality of warpage detection sensors at a plurality of different positions and electrically connected in series,
- wherein each of the plurality of warpage detection sensors is configured to generate a clock signal with a period that is based on a resistance that varies based on a pressure at a corresponding one of the plurality of positions, and to generate digital data by performing a counting operation in response to the clock signal.
A high bandwidth memory device comprising:
- a logic die;
- and
- a plurality of memory dies stacked on the logic die,
- wherein each of the plurality of memory dies comprises a plurality of warpage detection sensors at a plurality of different positions, respectively, and electrically connected in series,
- each of the plurality of warpage detection sensors being configured to generate a clock signal with a period that is based on a resistance that varies based on a pressure at a corresponding position, and to generate first digital data by performing a counting operation in response to the clock signal.
Dependencies are inferred from the claim text.