Pixel clock generating device, image writing device, and image forming apparatus

An image writing device comprising:

• at least one semiconductor laser configured to form an electrostatic latent image on a photoconductor;
• a high-frequency clock generator configured to generate a high-frequency clock;
• a comparer configured to measure a time interval between a leading-end synchronizing signal and a trailing-end synchronizing signal in a main scanning and calculate an error between the time interval and a target value;
• a pixel clock generator configured to generate a pixel clock based on the high-frequency clock and a pixel clock frequency and correct the pixel clock based on the error;
• and
• a value switcher including a plurality of groups of values with which the pixel clock is generated, each of the plurality of groups of values associated with a-faces of a polygonal mirror, the polygonal mirror including at least three faces,
• the value switcher configured to switch between the plurality of groups of values according to a switching signal based on the trailing-end synchronizing signal being inputted, the comparer calculating the error, and the pixel clock generator correcting the pixel clock.

An image writing device for writing images of a plurality of colors, the image writing device comprising a pixel clock generating device for each of the plurality of colors, the pixel clock generating device comprising:

• a high-frequency clock generator configured to generate a high-frequency clock;
• a comparer configured to measure a time interval between a leading-end synchronizing signal and a trailing-end synchronizing signal in a main scanning and calculate an error between the time interval and a target value;
• a pixel clock generator configured to generate a pixel clock based on the high-frequency clock and a pixel clock frequency and correct the pixel clock based on the error;
• and
• a value switcher including a plurality of groups of values with which the pixel clock is generated, each of the plurality of groups of values associated with a-faces of a polygonal mirror, the polygonal mirror including at least three faces,
• the value switcher configured to switch between the plurality of groups of values according to a switching signal based on the trailing-end synchronizing signal being inputted, the comparer calculating the error, and the pixel clock generator correcting the pixel clock.