Memory array structure, in-memory computing apparatus and method thereof

An in-memory computing apparatus, comprising:

• a memory structure, comprising a plurality of memory columns with a plurality of first bit lines and a plurality of second bit lines;
• and
• a comparator, configured to compare the first average voltage and the second average voltage to determine a lower average voltage and a higher average voltage among the first average voltage and the second average voltage, when the first average voltage is smaller than the second average voltage, the first average voltage is the lower average voltage and the second average voltage is the higher average voltage, and when the first average voltage is not smaller than the second average voltage, the first average voltage is the higher average voltage and the second average voltage is the lower average voltage,
• wherein each of the plurality of memory columns comprises:
• a bit line pair, comprising a first bit line and a second bit line, wherein the first bit line is one of the plurality of first bit lines and the second bit line is one of the plurality of second bit lines;
• a pre-charge switch pair, comprising a first pre-charge switch and a second pre-charge switch, wherein the first pre-charge switch is coupled to the first bit line and the second pre-charge switch is coupled to the second bit line;
• and
• a first switch pair, comprising a first switch and a second switch, wherein the first switch is coupled to the first bit line and the second switch is coupled to the second bit line,
• wherein output voltages from the plurality of first bit lines are used to generated a first average voltage, output voltages from the plurality of second bit lines are used to generated a second average voltage,
• wherein the pre-charge switch pair and the first switch pair of a selected memory column among the plurality of memory columns are controlled to repeatedly perform an incremental step to increment the lower average voltage by a step voltage until the lower average voltage is greater than the higher average voltage.

An analog-to-digital converting method, comprising:

• performing a first averaging operation to output voltages from a plurality of first bit lines in a plurality of memory columns to generate a first average voltage;
• performing a second averaging operation to output voltages from a plurality of second bit lines in the plurality of memory columns to generate a second average voltage;
• comparing the first average voltage and the second average voltage to determine a lower average voltage and a higher average voltage among the first average voltage and the second average voltage, wherein when the first average voltage is smaller than the second average voltage, the first average voltage is the lower average voltage and the second average voltage is the higher average voltage, and when the first average voltage is not smaller than the second average voltage, the first average voltage is the higher average voltage and the second average voltage is the lower average voltage;
• repeatedly performing an incremental step to increment the lower average voltage by a step voltage until the lower average voltage is greater than the higher average voltage;
• and
• outputting a digital code according to a number of the incremental step performed to the lower voltage.