Semiconductor structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsueh-Chih Chou, Chia Hao Tu, Sang Hoo Dhong, Lee-Chung Lu, Li-Chun Tien, Ting-Wei Chiang, Hui-Zhong Zhuang
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Abstract
A semiconductor structure is disclosed. The semiconductor structure includes: a first standard cell; and a second standard cell; wherein a cell width of the first standard cell along a first direction is substantially the same as a cell width of the second standard cell along the first direction, and a cell height of the first standard cell along a second direction perpendicular to the first direction is substantially greater than a cell height of the second standard cell along the second direction.
Claims20
A semiconductor structure, comprising:
- a first standard cell including a plurality of gate strips arranged therein;
- and
- a second standard cell including a plurality of gate strips arranged therein;
- wherein a cell width of the first standard cell along a first direction is substantially the same as a cell width of the second standard cell along the first direction;
- and
- wherein the cell width of the first standard cell is determined according to a number of the gate strips arranged in the first standard cell, and the cell width of the second standard cell is determined according to a number of the gate strips arranged in the second standard cell;
- and a drivability of the first or second standard cells depends on the corresponding cell height of the first or second standard cells along a second direction perpendicular to the first direction.
A semiconductor standard cell structure, comprising:
- an n-type active region and a p-type active region side by side disposed along a first direction;
- and
- a plurality of gate strips extending from a bottom to a top of the semiconductor standard cell structure along a second direction perpendicular to the first direction;
- wherein within the semiconductor standard cell structure, each of the gate strips passes over only one of the n-type active region or the p-type active region from a top view.
A semiconductor structure, comprising:
- a first standard cell including:
- an n-type active region and a p-type active region side by side disposed along a first direction;
- and
- a plurality of gate strips extending from a bottom to a top of the first standard cell along a second direction perpendicular to the first direction, wherein within the first standard cell, each of the gate strips passes over only one of the n-type active region or the p-type active region of the first standard cell from a top view;
- and
- a second standard cell including:
- an n-type active region and a p-type active region side by side disposed along the first direction;
- and
- a plurality of gate strips extending from a bottom to a top of the second standard cell along the second direction, wherein within the second standard cell, each of the gate strips passes over only one of the n-type active region or the p-type active region of the second standard cell from the top view;
- wherein a number of the gate strips in the first standard cell is substantially the same as a number of the gate strips in the second standard cell.
Dependencies are inferred from the claim text.