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US 10,658,357 B2Granted
Driver for driving a capacitive load
AssigneeTexas Instruments Incorporated
InventorsPranav Kumar, Yogesh Darwhekar
Life of this patent
Estimating the term…
Abstract
A circuit includes a first bipolar junction transistor (BJT) including a first base, a first collector, and a first emitter, the first collector connected to a first supply voltage node and a second BJT including a second base, a second collector, and a second emitter, the second collector connected to the first emitter at an output node. The circuit also includes a capacitor including a first capacitor terminal and a second capacitor terminal, the first capacitor terminal connected to the second emitter of the second BJT and the second capacitor terminal connected to a second supply voltage node. A current source device is also included that is connected in parallel with the capacitor.
Claims16
A circuit, comprising:
- a first bipolar junction transistor (BJT) including a first base, a first collector, and a first emitter, the first collector connected to a first supply voltage node;
- a second BJT including a second base, a second collector, and a second emitter, the second collector connected to the first emitter at an output node;
- a capacitor including a first capacitor terminal and a second capacitor terminal, the first capacitor terminal connected to the second emitter of the second BJT and the second capacitor terminal connected to a second supply voltage node;
- a current source device connected in parallel with the capacitor in which the current source device is comprised of at least one of either a transistor or a Zener diode;
- a control circuit coupled to receive a first control signal for the first base and, reciprocal to a logic state of the first control signal, to generate a second control signal for the second base;
- and
- a programmable register set accessible to the control circuit, the programmable register set to be programmed with trim values, wherein the control circuit is to read the trim values from the register and trim a peak-to-peak voltage of the second control signal based on at least one of the trim values.
4 more elements
A circuit, comprising:
- a first bipolar junction transistor (BJT) including a first base, a first collector, and a first emitter, the first collector connected to a first supply voltage node, and the first base coupled to receive a first control signal;
- a second BJT including a second base, a second collector, and a second emitter, the second collector connected to the first emitter at an output node;
- a capacitor including a first capacitor terminal and a second capacitor terminal, the first capacitor terminal connected to the second emitter of the second BJT and the second capacitor terminal connected to a second supply voltage node;
- a current source device connected in parallel with the capacitor in which the current source device is comprised of at least one of either a transistor or a Zener diode;
- a control circuit coupled to receive the first control signal for the first base and, reciprocal to a logic state of the first control signal, to generate a second control signal for the second base;
- and
- a programmable register set accessible to the control circuit, the programmable register set to be programmed with trim values, wherein the control circuit is to read the trim values from the register and trim a peak-to-peak voltage of the second control signal based on at least one of the trim values and trim a capacitance value of the capacitor based on at least one other trim value.
4 more elements
A circuit, comprising:
- a first bipolar junction transistor (BJT) including a first base, a first collector, and a first emitter, the first collector connected to a first supply voltage node;
- a second BJT including a second base, a second collector, and a second emitter, the second collector connected to the first emitter at an output node;
- a current source device comprised of at least one of either a transistor or a Zener diode in which the current source device is connected to the second emitter at a second node and configured to be coupled to a capacitor at the second node in parallel with the current source device;
- a control circuit coupled to receive a first control signal for the first base and, reciprocal to a logic state of the first control signal, to generate a second control signal for the second base;
- and
- a programmable register set accessible to the control circuit, the programmable register set to be programmed with trim values, wherein the control circuit is to read the trim values from the register and trim a peak-to-peak voltage of the second control signal based on at least one of the trim values.
3 more elements
Dependencies are inferred from the claim text.