Solder resist layer structures for terminating de-featured components and methods of making the same

A method of forming a microelectronic structure, comprising:

• forming a microelectronic package having a plurality of interconnects on an active surface thereof,
• forming a microelectronic substrate including forming an upper metallization layer and forming a solder resist structure, wherein forming the solder resist structure includes forming a conductive structure extending through the solder resist structure and forming an opening extending into the solder resist structure;
• and
• electrically attaching the microelectronic package to the microelectronic substrate;
• wherein the conductive structure electrically connects a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, wherein the opening prevents a second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer, and wherein the second interconnect of the plurality of interconnects does not physically contact the microelectronic substrate;
• wherein forming the solder resist structure comprises:
• forming a lower solder resist material layer;
• forming a lower opening through the lower solder resist material layer;
• forming an upper solder resist material layer on the lower solder resist material layer;
• forming a plurality of upper openings through the upper solder resist material layer;
• wherein one opening of the plurality of upper openings in the upper solder resist material layer is aligned with the lower opening through the lower solder resist material layer to form a first opening, and wherein another opening of the plurality of upper openings is not aligned with the lower opening through the lower solder resist material layer and comprises the opening which prevents the second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer;
• and
• disposing a conductive material within a first opening extending through the upper first solder resist material layer and the lower second solder resist material layer to form the conductive structure and wherein the opening which prevents the second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer extends through the upper solder resist material layer and terminates at the lower solder resist material layer.

An electronic system, comprising:

• a housing;
• and
• a microelectronic structure disposed within the housing, comprising:
• a microelectronic package having a plurality of interconnects on an active surface thereof;
• and
• a microelectronic substrate including an upper metallization layer and a solder resist structure, wherein the microelectronic substrate includes a conductive structure extending through the solder resist structure and wherein the microelectronic substrate includes an opening extending into the solder resist structure;
• wherein the conductive structure electrical connects a first interconnect of the plurality of interconnects of the microelectronic package and the upper metallization layer of the microelectronic substrate, and wherein the opening prevents a second interconnect of the plurality of interconnects of the microelectronic package from making electrical contact with the upper metallization layer, and wherein the second interconnect of the plurality of interconnects does not physically contact the microelectronic substrate, and
• wherein the solder resist structure comprises an upper solder resist material layer formed on a lower solder resist material layer, wherein the conductive structure extends through the upper solder resist material layer and the lower second solder resist material layer, and wherein the opening extends through the upper solder resist material layer and terminates at the lower solder resist material layer.