Mutual inductance suppressor for crosstalk immunity enhancement
AssigneeIntel Corporation
InventorsKhang Choong Yong, Jackson Chung Peng Kong, Bok Eng Cheah, Stephen H. Hall
Life of this patent
Estimating the term…
Abstract
Embodiments are generally directed to a mutual inductance suppressor for crosstalk immunity enhancement. An embodiment of a printed circuit board includes a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting; a second layer below the first layer, the second layer including a voltage reference plane; and a mutual inductance suppressor in the voltage reference plane, the mutual inductance suppressor including a serpentine portion of the voltage reference plane between the first signal trace and the second signal trace.
Claims25
A printed circuit board comprising:
- a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting;
- a second layer below the first layer, the second layer including a voltage reference plane;
- and
- a mutual inductance suppressor in the voltage reference plane, the mutual inductance suppressor including a serpentine portion of the voltage reference plane between the first signal trace and the second signal trace, the serpentine portion non-overlapping with the first signal trace and non-overlapping with the second signal trace from a plan view perspective.
A method for fabrication of a circuit board comprising:
- fabricating a first layer including a voltage reference plane on a first layer;
- and
- fabricating a first signal trace and a second signal trace on a second layer, wherein the first signal trace and second signal trace are non-intersecting;
- wherein fabricating the first layer including the voltage reference plane includes fabricating a mutual inductance suppressor in the voltage reference plane, the mutual inductance suppressor including a serpentine portion of the voltage reference plane between the first signal trace and the second signal trace, the serpentine portion non-overlapping with the first signal trace and non-overlapping with the second signal trace from a plan view perspective.
A system comprising:
- a processing element for the processing of data;
- a memory for the storage of data;
- a transmitter or receiver and one or more antennae for the transmission or reception of data;
- and
- a printed circuit board including:
- a first signal trace and a second signal trace on a first layer, wherein the first signal trace and second signal trace are non-intersecting;
- a second layer below the first layer, the second layer including a voltage reference plane;
- and
- a mutual inductance suppressor in the voltage reference plane, the mutual inductance suppressor including a serpentine portion of the voltage reference plane between the first signal trace and the second signal trace, the serpentine portion non-overlapping with the first signal trace and non-overlapping with the second signal trace from a plan view perspective.
Dependencies are inferred from the claim text.