CMOS image sensor with improved column data shift readout

An imaging sensor comprising:

• a pixel array having a plurality of imaging pixel sensor cells arranged in a number H horizontal rows and a number N vertical columns, pixel cell data being read out on N column lines of the array through the action of control signal circuits;
• a separate analog-to-digital conversion (ADC) circuit coupled on an input side to each column line and on an output side to a separate M-bit wide digital memory circuit, pixel cell data being stored on each memory circuit representing pixel cell data output from each column line;
• a number of group readout circuits each coupled to a number of adjacent digital memory circuits and each group readout circuit capable of transferring out digital memory data from each of the number of memory circuits, wherein the number of group readout circuits is sufficient to read out all of the N column lines of the array;
• a column data readout circuit comprising M-bit data shifters, one coupled to each of the group readout circuits, and single pole double throw (SPDT) switches whose common terminals provide inputs to the M-bit data shifters, wherein a first switch state of the SPDT switches connects the input of their associated M-bit data shifters to their associated group readout circuit and wherein a second switch state of the SPDT switches connects the input of their associated M-bit data shifters to an M-bit wide output bus from an adjacent M-bit data shifter;
• an M-bit parallel data process and output driver circuit coupled to the M-bit data shifter associated with the last array column to output pixel cell data from the imaging sensor and wherein employing these components may enable the imaging sensor to consume reduced power and to generate reduced electromagnetic interference and to operate at increased frame rate.