Determining clock signal quality using a plurality of sensors
AssigneeInternational Business Machines Corporation
InventorsPhillip John Restle, Christos Vezyrtzis, James Douglas Warnock
Life of this patent
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Abstract
Techniques for determining the quality of a clock signal are provided. In one example, a method can comprise comparing, by a sensory circuitry of a system, a first output of a first sensor and a second output of a second sensor. The first output and the second output can be based on a parameter of a clock signal. Further, in some embodiments, the first sensor and the second sensor can be local clock buffers. The method can also comprise determining, by a controller of the system, a quality of the clock signal based on the comparing of the first output and the second output.
Claims15
A method, comprising:
- comparing, by sensory circuitry of a system, a first output of a first sensor and a second output of a second sensor, wherein the first output and the second output are based on a parameter of a clock signal, and wherein the first sensor and the second sensor comprise respective local clock buffers, wherein each of the respective local clock buffers comprise a series of inverters with a capacitor coupled to ground between consecutive inverters in the series of inverters, to enable the respective local clock buffers to have adjustable capacitances, and wherein an increase in a number of the capacitors in the first sensor or the second sensor causes a corresponding increase in delay of the first output or the second output sent to a digital delay sensor such that a first total number of capacitors, X, in the first sensor causes a first delay of the first output to the digital delay sensor and a second total number of capacitors in the second sensor causes a second delay of the second output to the digital delay sensor, wherein the first delay is less than the second delay based on the first total number of capacitors being less than the second total number of capacitors wherein the second total number of capacitors equal X+N, wherein X and N are whole integers;
- and
- determining, by a controller of the system, a quality of the clock signal based on the comparing of the first output and the second output.
A method, comprising:
- determining, by sensory circuitry of a system, a time delay of a local clock signal based on comparing a first output of a first sensor and a second output of a second sensor, wherein the first sensor and the second sensor comprise respective local clock buffers, wherein each of the respective local clock buffers comprise a series of inverters with capacitors coupled to ground between consecutive inverters in the series of inverters, to enable the respective local clock buffers to have adjustable capacitances, and wherein an increase in a number of the capacitors in the first sensor or the second sensor causes a corresponding increase in delay of the first output or the second output sent to a digital delay sensor such that a first total number of capacitors, X, in the first sensor causes a first delay of the first output to the digital delay sensor and a second total number of capacitors in the second sensor causes a second delay of the second output to the digital delay sensor, wherein the first delay is less than the second delay based on the first total number of capacitors being less than the second total number of capacitors wherein the second total number of capacitors equal X+N, wherein X and N are whole integers
- determining, by a controller of the system, a quality of a global clock signal based on the determining of the time delay of the local clock signal;
- and
- determining, by the controller of the system, whether the quality is greater than a defined threshold value.
Dependencies are inferred from the claim text.