Reverse direction high-electron-mobility logic gate
OwnerDavid L. Whitney, Manuel M. Del Arrozinventors
Life of this patent
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Abstract
A logic gate includes at least one reverse direction high-electron-mobility transistor. The reverse direction high-electron-mobility transistor includes at least one source connected to a first reference voltage, at least one gate connected to an output, and at least one drain connected to the output. Logic implementing circuitry is connected between the output an additional reference voltage. The logic implementing circuitry includes a first transistor that includes a gate connected to a first input, and a second transistor that includes a gate connected to a second input.
Claims17
A logic NAND gate comprising:
- a first input;
- a second input;
- an output;
- a first reference voltage;
- a second reference voltage, the second reference voltage having a higher voltage value that the first voltage reference;
- a third reference, the third reference voltage having a lower voltage value that the first voltage reference;
- a reverse direction high-electron-mobility transistor, the reverse direction high-electron-mobility transistor including:
- a source connected to the first reference voltage,
- a gate connected to the output, and
- a drain connected to the output;
- and
- logic implementing circuitry connected between the output and the third reference voltage, the logic implementing circuitry including:
- a first transistor and a second transistor connected in series;
- wherein a gate of the first transistor is connected to the first input;
- and,
- wherein a gate of the second transistor is connected to the second input.
A logic gate comprising:
- a first input;
- a second input;
- an output;
- a first reference voltage;
- a second reference voltage, the second reference voltage having a higher voltage value that the first voltage reference;
- a third reference, the third reference voltage having a lower voltage value that the first voltage reference;
- at least one reverse direction high-electron-mobility transistor, the reverse direction high-electron-mobility transistor including:
- at least one source connected to the first reference voltage,
- at least one gate connected to the output, and
- at least one drain connected to the output;
- and
- logic implementing circuitry connected between the output and the third reference voltage, the logic implementing circuitry including:
- a first transistor that includes a gate connected to the first input, and
- a second transistor that includes a gate connected to the second input.
A logic transmission gate comprising:
- a first input/output;
- a second input/output;
- a control input;
- a first reference voltage;
- a second reference voltage, the second reference voltage having a lower voltage value that the first voltage reference;
- a first reverse direction high-electron-mobility transistor, including:
- a source connected to the first input/output,
- a drain connected to the second input/output, and
- a gate;
- a second reverse direction high-electron-mobility transistor, including:
- a drain connected to the first input/output,
- a source connected to the second input/output, and
- a gate connected to the gate of the first reverse direction high-electron-mobility transistor;
- a transistor, including:
- a gate connected to the control input,
- a drain connected to the gate of the first reverse direction high-electron-mobility transistor, and
- a source connected to the second reference voltage;
- and
- a resistance connected between the gate of the first reverse direction high-electron-mobility transistor and the first reference voltage.
Dependencies are inferred from the claim text.