Self aligned top extension formation for vertical transistors
AssigneeInternational Business Machines Corporation
InventorsOleg Gluschenkov, Sanjay C. Mehta, Shogo Mochizuki, Alexander Reznicek
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Abstract
A method of forming a semiconductor device that includes providing a vertically orientated channel region; and converting a portion of an exposed source/drain contact surface of the vertically orientated channel region into an amorphous crystalline structure. The amorphous crystalline structure is from the vertically orientated channel region. An in-situ doped extension region is epitaxially formed on an exposed surface of the vertically orientated channel region. A source/drain region is epitaxially formed on the in-situ doped extension region.
Claims20
A semiconductor device comprising:
- a first source/drain region on a supporting substrate;
- a vertically orientated channel region, wherein an extension of the first source/drain region is present at a first end of the vertically orientated channel region includes a portion of the doped semiconductor material that provided the first source/drain region;
- an epitaxial uniformly doped extension region layer present at a second end of the vertically orientated channel region;
- and
- a second source/drain region epitaxially formed on the epitaxial uniformly doped extension region layer present at the second end of the vertically orientated channel region, the second source/drain region having a diamond geometry with sidewall having an apex.
A semiconductor device comprising:
- a first source/drain region on a supporting substrate;
- a vertically orientated channel region;
- an epitaxial extension region layer present at a second end of the vertically orientated channel region;
- and
- a second source/drain region on the epitaxial uniformly doped extension region layer, wherein the epitaxial uniformly doped extension region layer is a separate layer from the vertically orientated channel region and the second source/drain region, the second source/drain region having a diamond geometry with sidewall having an apex.
A semiconductor device comprising:
- a vertically orientated channel region;
- a first source/drain region present at a first end of the vertically orientated channel region;
- and
- an epitaxial uniformly doped extension region layer present at a second end of the vertically orientated channel region;
- and
- a second source/drain region epitaxially formed on the epitaxial uniformly doped extension region layer present at the second end of the vertically orientated channel region, the second source/drain region having a diamond geometry with sidewall having an apex.
Dependencies are inferred from the claim text.