Semiconductor device and a method for fabricating the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYao-De Chiou, Janet Chen, Jeng-Ya Yeh
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Abstract
A semiconductor device includes a first field effect transistor (FET) including a first gate dielectric layer and a first gate electrode. The first gate electrode includes a first lower metal layer and a first upper metal layer. The first lower metal layer includes a first underlying metal layer in contact with the first gate dielectric layer and a first bulk metal layer. A bottom of the first upper metal layer is in contact with an upper surface of the first underlying metal layer and an upper surface of the first bulk metal layer.
Claims20
A semiconductor device comprising:
- a first field effect transistor (FET) including a first gate dielectric layer and a first gate electrode, wherein:
- the first gate electrode includes a first lower metal layer and a first upper metal layer,
- the first lower metal layer includes a first underlying metal layer in contact with the first gate dielectric layer and a first bulk metal layer fully filling a space formed by the first underlying metal layer,
- the first underlying metal layer consists of Ti,
- the first bulk metal layer consists of TiN, and
- a bottom of the first upper metal layer is in contact with an upper surface of the first underlying metal layer and an upper surface of the first bulk metal layer.
A semiconductor device, comprising:
- an FET including a gate dielectric layer and a gate electrode, wherein:
- the gate electrode includes a lower metal layer and a upper metal layer,
- the lower metal layers includes a first underlying metal layer in contact with the gate dielectric layer, a second underlying metal layer and a bulk metal layer fully filing a space formed by the second underlying metal layer,
- the first underlying metal layer consists of TiN,
- the second underlying metal layer consists of Ti,
- the bulk metal layer consists of TiN, and
- a bottom of the upper metal layer is in contact with an upper surface of the first underlying metal layer, an upper surface of the second underlying metal layer and an upper surface of the bulk metal layer.
A semiconductor device, comprising:
- a first FET including a first gate dielectric layer and a first gate electrode;
- and
- a second FET including a second gate dielectric layer and a second gate electrode, wherein:
- a gate length of the first FET is smaller than a gate length of the second FET,
- the first gate electrode includes a first lower metal layer and a first upper metal layer,
- the first lower metal layers includes a first underlying metal layer in contact with the first gate dielectric layer, a second underlying metal layer disposed on the first underlying metal layer and a first bulk metal layer fully filing a space formed by the second underlying metal layer,
- the second gate electrode includes a second lower metal layer and a second upper metal layer,
- the second lower metal layer includes a third underlying metal layer in contact with the second gate dielectric layer and a second bulk metal layer fully filling a space formed by the third underlying metal layer,
- the first underlying metal layer consists of TiN,
- the second underlying metal layer consists of Ti,
- the first bulk metal layer consists of TiN,
- the third underlying metal layer consists of Ti, and
- the second bulk metal layer consists of TiN.
Dependencies are inferred from the claim text.