Charge compensation semiconductor devices

A method for forming a field-effect semiconductor device, the method comprising:

• providing a wafer comprising an upper side and a substantially compensated semiconductor layer extending to the upper side and comprising a semiconductor material which is co-doped with n-type dopants and p-type dopants, wherein an active area and a peripheral area laterally surrounding the active area are defined in the wafer and trenches are provided in the active area extending from the upper side, the trenches comprising, in a vertical direction perpendicular to the upper side, a vertical extension;
• filling the trenches with a substantially intrinsic semiconductor material;
• diffusing more p-type dopants than n-type dopants from the substantially compensated semiconductor layer into the substantially intrinsic semiconductor material of the trenches to form a plurality of p-type compensation regions in the trenches which are separated from each other by respective n-type drift portions;
• forming a dielectric layer on the upper side of the wafer;
• and
• introducing p-type dopants at least into a semiconductor zone of the peripheral area, so that the semiconductor zone and the dielectric layer form an interface having, in a vertical cross-section and in a horizontal direction parallel to the upper side of the wafer, a horizontal extension which is larger than the vertical extension of the trenches.