Thin film transistor substrate for organic light-emitting diode display and manufacturing method thereof

A thin film transistor substrate, comprising:

• a substrate defining a pixel area;
• a first thin film transistor on the substrate, the first thin film transistor comprising:
• an oxide semiconductor layer;
• a first gate electrode on the oxide semiconductor layer;
• a first source electrode;
• and
• a first drain electrode;
• a second thin film transistor on the substrate, the second thin film transistor comprising:
• a second gate electrode;
• a polycrystalline semiconductor layer on the second gate electrode;
• a second source electrode;
• and
• a second drain electrode;
• a first gate insulating layer under the first gate electrode and the second gate electrode, the first gate insulating layer covering the oxide semiconductor layer;
• a second gate insulating layer under the polycrystalline semiconductor layer, the second gate insulating layer covering the first gate electrode and the second gate electrode;
• and
• an intermediate insulating layer on the first gate electrode and the polycrystalline semiconductor layer, the intermediate insulating layer comprising a nitride layer,
• wherein the second gate electrode overlaps part of a drain area of the oxide semiconductor layer,
• wherein the first gate insulating layer is between the second gate electrode and the oxide semiconductor layer,
• wherein the first source electrode is on the intermediate insulating layer,
• wherein the first source electrode contacts one side of the oxide semiconductor layer via a first source contact hole penetrating the intermediate insulating layer, the second gate insulating layer, and the first gate insulating layer,
• wherein the first drain electrode is on the intermediate insulating layer, and
• wherein the first drain electrode contacts another side of the oxide semiconductor layer and the second gate electrode, that overlaps the part of the drain area of the oxide semiconductor layer, via a first drain contact hole penetrating the intermediate insulating layer, the second gate insulating layer, and the first gate insulating layer.