Array substrate for X-ray detector and X-ray detector including the same
AssigneeLG Display Co., Ltd.
InventorJungyul Yang
Life of this patent
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Abstract
An array substrate for an X-ray detector and an X-ray detector including the reduces or minimizes a leakage current caused by etching of a PIN layer, and also reduces or minimizes light reaction of the PIN layer within a non-pixel region. The array substrate for the X-ray detector includes an integrated PIN layer formed to cover all pixel regions. Upper electrodes, which are spaced apart from each other according to individual pixel regions, are disposed over the PIN layer. A light shielding portion is disposed between neighboring upper electrodes.
Claims20
An array substrate for a digital X-ray detector, comprising:
- a base substrate including a plurality of gate lines and a plurality of data lines arranged perpendicular to the plurality of gate lines, the base substrate configured to include a plurality of pixel regions positioned proximate to overlapping locations of the plurality of gate lines and the plurality of data lines;
- a plurality of thin film transistors proximate the overlapping locations of the gate lines and the data lines;
- a plurality of lower electrodes in the respective pixel regions, and the plurality of lower electrodes connected to the respective thin film transistors;
- a PIN layer over the plurality of lower electrodes and configured to cover an entirety of the plurality of pixel regions;
- a plurality of upper electrodes corresponding to the respective plurality of lower electrodes positioned over the PIN layer;
- and
- a light shielding portion disposed between neighboring ones of the plurality of upper electrodes.
A digital X-ray detector, comprising:
- an array substrate including:
- a base substrate having a plurality of gate lines and a plurality of data lines, the plurality of data lines being arranged perpendicular to the plurality of data lines to form a plurality of overlapping portions of the plurality of gate and data lines, and the plurality of overlapping portions defining a plurality of pixel regions of the base substrate;
- a plurality of thin film transistors, each of the plurality of thin film transistors being proximate a corresponding one of the plurality of overlapping portions;
- a plurality of lower electrodes, each of the plurality of lower electrodes being in a corresponding one of the plurality of pixel regions and coupled to the one of the plurality of thin film transistors proximate the corresponding one of the plurality of overlapping portions;
- a PIN layer over the plurality of lower electrodes, the PIN layer covering all of the plurality of pixel regions;
- a plurality of upper electrodes over the PIN layer, each of the plurality of upper electrodes positioned opposing a corresponding one of the plurality of lower electrodes;
- and
- a light shielding portion between neighboring ones of the plurality of upper electrodes;
- and
- a scintillator layer disposed over the array substrate.
An array substrate, comprising:
- a base substrate including a plurality of gate lines and a plurality of data lines arranged perpendicular to the plurality of gate lines, a plurality of pixel regions defined at intersection points of the plurality of gate lines and data lines;
- a plurality of thin film transistors, each thin film transistor being in a corresponding one of the plurality of pixel regions;
- a plurality of lower electrodes, each lower electrode in a corresponding one of the pixel regions and coupled to the corresponding thin film transistor in the pixel region;
- a PIN layer covering entirely the plurality of pixel regions;
- a plurality of upper electrodes over the PIN layer, each upper electrode opposing a corresponding lower electrode;
- and
- a light shielding portion between adjacent upper electrodes.
Dependencies are inferred from the claim text.