US 10,651,209 B2Granted

Semiconductor device and method for manufacturing same

AssigneeSharp Kabushiki Kaisha

InventorsTakao Saitoh, Yohsuke Kanzaki, Makoto Nakazawa, Kazuatsu Ito, Seiji Kaneko

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Abstract

A semiconductor device includes: a first thin film transistor (101) including a crystalline silicon semiconductor layer (13); and a second thin film transistor (102) including an oxide semiconductor layer (23). First source/drain electrodes (31), (33) of the first thin film transistor (101) are provided on the crystalline silicon semiconductor layer via a first interlevel dielectric layer (L1); a second source electrode (25S) of the second thin film transistor (102) is electrically connected to a line (35) which is made of the same conductive film as the first source/drain electrodes; the line (35) is provided on the second source electrode (25S) via a second interlevel dielectric layer (L2), and is in contact with the second source electrode (25S) within a second contact hole including an opening made in the second interlevel dielectric layer (L2); the second source electrode has a multilayer structure including a main layer (25m) and an upper layer (25u) disposed on the main layer such that, under the opening in the second interlevel dielectric layer, the upper layer (25u) has a first aperture and the main layer (25m) has a second aperture (p2) or recess, the second aperture (p2) or recess being larger than the first aperture (p1) as viewed from the normal direction of the substrate.

Claims20

Dependent claims

A semiconductor device comprising:

a substrate;
and a first thin film transistor and a second thin film transistor supported on the substrate, wherein,
the first thin film transistor includes a first gate electrode, a crystalline silicon semiconductor layer, a first gate dielectric layer interposed between the first gate electrode and the crystalline silicon semiconductor layer, and a first source electrode and a first drain electrode electrically connected to the crystalline silicon semiconductor layer;
the second thin film transistor includes a second gate electrode, an oxide semiconductor layer, a second gate dielectric layer interposed between the second gate electrode and the oxide semiconductor layer, and a second source electrode and a second drain electrode electrically connected to the oxide semiconductor layer;
the first source electrode and the first drain electrode are provided on the crystalline silicon semiconductor layer via a first interlevel dielectric layer, and are in contact with the crystalline silicon semiconductor layer respectively within a first source contact hole and a first drain contact hole made in the first interlevel dielectric layer;
the second source electrode is electrically connected to a line which is made of a same conductive film as the first source electrode and the first drain electrode;
the line is provided on the second source electrode via a second interlevel dielectric layer, and is in contact with the second source electrode within a second contact hole, the second contact hole including an opening made in the second interlevel dielectric layer;
and
the second source electrode has a multilayer structure including a main layer and an upper layer disposed on the main layer, wherein under the opening in the second interlevel dielectric layer the upper layer has a first aperture and the main layer has a second aperture or a recess, the second aperture or recess being larger than the first aperture as viewed from a normal direction of the substrate.

6 more elements

A method of producing a semiconductor device including, on a substrate:

a first thin film transistor having an active layer which is a crystalline silicon semiconductor layer;
and a second thin film transistor having an active layer which is an oxide semiconductor layer, the first thin film transistor being disposed in a first TFT forming region and the second thin film transistor being disposed in a second TFT forming region, the method comprising:
(A) a step of providing a substrate, including:
in the first TFT forming region, the crystalline silicon semiconductor layer and a first interlevel dielectric layer covering the crystalline silicon semiconductor layer;
and, in the second TFT forming region, a source electrode and a drain electrode of the second thin film transistor, and a second interlevel dielectric layer covering the source electrode and the drain electrode, the source electrode and the drain electrode having a multilayer structure including a main layer and an upper layer on the main layer, the upper layer having a smaller etching rate with respect to hydrofluoric acid than that of the main layer;
(B) a step of making a first source contact hole and a first drain contact hole in the first interlevel dielectric layer, the first source contact hole and the first drain contact hole reaching the crystalline silicon semiconductor layer, and an opening in the second interlevel dielectric layer, the opening reaching the source electrode;
(C) a step of cleaning a surface of the crystalline silicon semiconductor layer exposed through the first source contact hole and the first drain contact hole with a cleaning agent containing hydrofluoric acid, wherein, as a result of the upper layer and the main layer of the source electrode being etched with the cleaning agent, under the opening in the second interlevel dielectric layer, a first aperture is made in the upper layer and a second aperture or a recess is made in the main layer, thus forming a second contact hole which includes the opening, the first aperture, and the second aperture or recess;
and
(D) a step of forming, on the second interlevel dielectric layer and in the second contact hole, a line which is in contact with the source electrode within the second contact hole.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/072,910Filed 16 Jan 2017
Priority: JP 2016-01298227 Jan 2016
Published: US 2019/0035824 A131 Jan 2019
Granted: 12 May 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification18 codes

G06F 3/0412
Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means: digitisers structurally integrated in a display
G06F 3/04164
Control or interface arrangements specially adapted for digitisers: connections between sensors and controllers, e.g. routing lines between…
H10D 30/6755
Characterised by the active materials: oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
H10D 64/62
Electrodes characterised by their materials: electrodes ohmically coupled to a semiconductor