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US 10,651,206 B2Granted
Semiconductor device
AssigneeJapan Display Inc.
InventorMasahiro Tada
Life of this patent
Estimating the term…
Abstract
According to one embodiment, a semiconductor device includes a first gate electrode, a semiconductor layer, a first insulating layer, a second gate electrode, a second insulating layer, a third insulating layer, a first contact hole, and a first electrode. The first electrode passes through the first contact hole and electrically connects the first gate electrode, the first region and the second gate electrode.
Claims10
A semiconductor device comprising:
- a first gate electrode;
- a semiconductor layer which is provided above the first gate electrode, and includes a first region, a second region and a channel region located between the first region and the second region and facing the first gate electrode;
- a first insulating layer provided between the first gate electrode and the semiconductor layer;
- a second gate electrode located above the semiconductor layer and facing the channel region;
- a second insulating layer provided between the semiconductor layer and the second gate electrode;
- a third insulating layer provided above the first insulating layer, the semiconductor layer, the second insulating layer and the second gate electrode;
- a first contact hole penetrating the first insulating layer and the third insulating layer, and located in an area facing the first gate electrode, the first region and the second gate electrode;
- and
- a first electrode passing through the first contact hole and electrically connecting the first gate electrode, the first region and the second gate electrode,
- wherein
- each of the first gate electrode and the second gate electrode is not in direct contact with the semiconductor layer.
8 more elements
A semiconductor device comprising:
- a first gate electrode;
- a semiconductor layer which is provided above the first gate electrode, and includes a first region, a second region and a channel region located between the first region and the second region and facing the first gate electrode;
- a first insulating layer provided between the first gate electrode and the semiconductor layer;
- a second gate electrode located above the semiconductor layer and facing the channel region;
- a second insulating layer provided between the semiconductor layer and the second gate electrode;
- a third insulating layer provided above the first insulating layer, the semiconductor layer, the second insulating layer and the second gate electrode;
- a first contact hole penetrating the third insulating layer, and located in an area facing the first region and the second gate electrode;
- a first electrode passing through the first contact hole, and electrically connecting the first region and the second gate electrode;
- a second contact hole penetrating the first insulating layer and the third insulating layer, and located in an area facing the first gate electrode and the second region;
- and
- a second electrode passing through the second contact hole, and electrically connecting the first gate electrode and the second region,
- wherein
- each of the first gate electrode and the second gate electrode is not in direct contact with the semiconductor layer.
10 more elements
Dependencies are inferred from the claim text.