Cross-coupled transistor circuit defined on three gate electrode tracks

A cross-coupled transistor circuit, comprising:

• a first PMOS transistor having a gate electrode formed by a first conductive structure;
• a second PMOS transistor having a gate electrode formed by a second conductive structure;
• a first NMOS transistor having a gate electrode formed by a third conductive structure;
• a second NMOS transistor having a gate electrode formed by a fourth conductive structure,
• wherein at least one of the first and second conductive structures forms only one transistor gate electrode,
• wherein at least one of the third and fourth conductive structures forms only one transistor gate electrode,
• each of the first and second PMOS transistors having a respective gate electrode electrically connected to a gate electrode of a different one of the first and second NMOS transistors,
• each of the first and second PMOS transistors and the first and second NMOS transistors having a respective diffusion terminal electrically connected to each other through at least one overlying conductive structure.

A cross-coupled transistor circuit, comprising:

• a first PMOS transistor having a gate electrode formed by a first conductive structure;
• a second PMOS transistor having a gate electrode formed by a second conductive structure;
• a first NMOS transistor having a gate electrode formed by a third conductive structure;
• a second NMOS transistor having a gate electrode formed by a fourth conductive structure,
• wherein at least one of the first and second conductive structures forms only one transistor gate electrode,
• wherein at least one of the third and fourth conductive structures forms only one transistor gate electrode,
• each of the first and second PMOS transistors having a respective gate electrode electrically connected to a gate electrode of a different one of the first and second NMOS transistors,
• each of the first and second PMOS transistors and the first and second NMOS transistors having a respective diffusion terminal electrically connected to each other,
• the gate electrodes of the second PMOS transistor and first NMOS transistor positioned along a same line.

A semiconductor chip, comprising:

• a first transistor of a first transistor type having a gate electrode formed to extend in a substantially straight manner in a first direction;
• a second transistor of the first transistor type having a gate electrode formed to extend in a substantially straight manner in the first direction;
• a first transistor of a second transistor type having a gate electrode formed to extend in a substantially straight manner in the first direction;
• and
• a second transistor of the second transistor type having a gate electrode formed to extend in a substantially straight manner in the first direction,
• wherein the first transistor of the first transistor type and the second transistor of the first transistor type share a first diffusion region of a first diffusion type,
• wherein the first transistor of the second transistor type includes a first diffusion region of a second diffusion type,
• wherein the second transistor of the second transistor type includes a second diffusion region of the second diffusion type, and
• wherein the first diffusion region of the second diffusion type is physically separate from the second diffusion region of the second diffusion type by an intervening non-active region, and
• wherein the gate electrode of the first transistor of the first transistor type is formed by a linear-shaped conductive structure that is aligned in the first direction with the intervening non- active region that physically separates the first diffusion region of the second diffusion type from the second diffusion region of the second diffusion type.

A semiconductor chip, comprising:

• a first transistor of a first transistor type having a gate electrode formed from a portion of a first substantially rectangular-shaped conductive structure;
• a second transistor of the first transistor type having a gate electrode formed from a portion of a second substantially rectangular-shaped conductive structure;
• a first transistor of a second transistor type having a gate electrode formed from a portion of a third substantially rectangular-shaped conductive structure;
• and
• a second transistor of the second transistor type having a gate electrode formed from a portion of a fourth substantially rectangular-shaped conductive structure,
• the gate electrode of the first transistor of the first transistor type electrically connected to the gate electrode of the second transistor of the second transistor type,
• the gate electrode of the second transistor of the first transistor type electrically connected to the gate electrode of the first transistor of the second transistor type,
• the gate electrodes of the first and second transistors of the first transistor type having respective lengthwise centerlines separated by a gate pitch,
• the gate electrodes of the first and second transistors of the second transistor type having respective lengthwise centerlines separated by more than the gate pitch.