Semiconductor memory device

A semiconductor memory device comprising:

• a stacked body provided above a substrate, in which conductive layers are isolated from each other and stacked along a first direction crossing a surface of the substrate;
• a source layer provided between the substrate and the stacked body;
• memory pillars that extend through the stacked body along the first direction and are coupled to the source layer;
• a first insulation film provided above the memory pillars;
• an isolation region provided higher than upper surfaces of the memory pillars in the stacked body along the first direction, the isolation region isolating the stacked body in a second direction crossing the first direction;
• a first silicon nitride member provided above the first insulation film;
• a second silicon nitride member provided on a side wall of the isolation region;
• and
• through contacts penetrating the first insulation film, the stacked body and the source layer along the first direction, only one through contact of the through contacts being provided to correspond to one hole extending through the stacked body.