Three-dimensional memory devices and methods for forming the same
AssigneeYangtze Memory Technologies Co., Ltd.
InventorJun Liu
Life of this patent
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Abstract
Embodiments of three-dimensional (3D) memory devices and methods for forming the 3D memory devices are disclosed. In an example, a 3D memory device includes a substrate, a peripheral device disposed on the substrate, a peripheral interconnect layer disposed above the peripheral device, a first source plate disposed above and electrically connected to the peripheral interconnect layer, a first memory stack disposed on the first source plate, a first memory string extending vertically through the first memory stack and in contact with the first source plate, and a first bit line disposed above and electrically connected to the first memory string and the peripheral device.
Claims12
A three-dimensional (3D) memory device, comprising:
- a substrate;
- a peripheral device comprising a multiplexer disposed on the substrate;
- a first memory stack disposed above the peripheral device;
- a first memory string extending vertically through the first memory stack;
- a first bit line disposed above and electrically connected to the first memory string and the multiplexer, wherein the first bit line is electrically connected to a first drain at an upper end of the first memory string;
- a second memory stack disposed above the first bit line;
- a second memory string extending vertically through the second memory stack;
- and
- a second bit line disposed above and electrically connected to the second memory string and the multiplexer, wherein the second bit line is electrically connected to a second drain at an upper end of the second memory string,
- wherein the multiplexer is electrically connected to the first and second memory strings as inputs, and the multiplexer is configured to select one of the first and second memory strings to be forwarded through the multiplexer.
A three-dimensional (3D) memory device, comprising:
- a substrate;
- a peripheral device disposed on the substrate;
- a first memory stack disposed above the peripheral device;
- a first memory string extending vertically through the first memory stack;
- a first bit line disposed above and electrically connected to the first memory string and the peripheral device, wherein the first bit line is electrically connected to a first drain at an upper end of the first memory string;
- a second memory stack disposed above the first bit line;
- a second memory string extending vertically through the second memory stack;
- a second bit line disposed above and electrically connected to the second memory string and the peripheral device, wherein the second bit line is electrically connected to a second drain at an upper end of the second memory string;
- a third memory stack disposed above the second bit line;
- a third memory string extending vertically through the third memory stack;
- and
- a third bit line disposed above and electrically connected to the third memory string and the peripheral device, wherein the third bit line is electrically connected to a third drain at an upper end of the third memory string.
Dependencies are inferred from the claim text.