US 10,651,185 B2Granted

Semiconductor device and method of manufacturing the same

AssigneeToshiba Memory Corporation

InventorAkio Kaneko

Life of this patent

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Abstract

A semiconductor device includes a first electrode layer and a second electrode layer formed thereon to be spaced from the first electrode layer, a columnar portion penetrating the first and second electrode layers in a first direction and including a semiconductor layer, a first insulating film between the first and second electrode layers and the semiconductor layer and in contact with the first electrode layer, a charge storage layer between the second electrode layer and the first insulating film, and an insulating film between the second electrode layer and the charge storage layer. The semiconductor layer includes a first portion facing the second electrode layer in a second direction intersecting with the first direction and a second portion in contact with the first portion in the first direction. A concentration of a impurity contained in the second portion is higher than that of the impurity contained in the first portion.

Claims7

Dependent claims

A semiconductor device comprising:

an under layer;
a first electrode layer on the under layer;
a second electrode layer stacked on the first electrode layer in a stacking direction so as to be spaced from the first electrode layer in first direction, which is the stacking direction;
a columnar portion penetrating the first and second electrode layers in the first direction, the columnar portion including a semiconductor layer;
a first insulating film provided between the first and second electrode layers and the semiconductor layer and in contact with the first electrode layer;
a charge storage layer provided between the second electrode layer and the first insulating film;
and
a second insulating film provided between the second electrode layer and the charge storage layer, wherein
the semiconductor layer includes a first portion facing the second electrode layer in a second direction intersecting with the first direction and a second portion being in contact with the first portion in the first direction, and
a concentration of a first impurity contained in the second portion is higher than a concentration of the first impurity contained in the first portion.

7 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/694,737Filed 1 Sep 2017
Priority: JP 2017-05771123 Mar 2017
Published: US 2018/0277554 A127 Sep 2018
Granted: 12 May 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification14 codes

H10B 41/27
With source and drain on different levels, e.g. with sloping channels: the channels comprising vertical portions, e.g. U-shaped channels
H10B 41/35
Characterised by the memory core region: with a cell select transistor, e.g. NAND
H10B 43/27
With source and drain on different levels, e.g. with sloping channels: the channels comprising vertical portions, e.g. U-shaped channels
H10B 43/35
Characterised by the memory core region: with cell select transistors, e.g. NAND