Integrated circuit device and method of manufacturing the same

An integrated circuit device comprising:

• a plurality of active regions formed on a substrate and extending in a first direction;
• a first gate line and a second gate line formed on the substrate, extending in a straight line in a second direction and crossing the plurality of active regions, wherein the first gate line and the second gate line are spaced apart from each other;
• a first gate insulation layer extending in the second direction and covering a first surface of the first gate line, the first surface of the first gate line facing the first direction, in a region where a first set of the plurality of active regions cross the first gate line, while not covering a first short-axis sidewall of the first gate line facing the second gate line in the second direction;
• a second gate insulation layer extending in the second direction and covering a second surface of the second gate line, the second surface of the second gate line facing the first direction, in a region where a second set of the plurality of active regions cross the second gate line, while not covering a second short-axis sidewall of the second gate line facing the first gate line in the second direction;
• and
• an inter-gate insulation region interposed between the first gate line and the second gate line and abutting the first short-axis sidewall and the second short-axis sidewall,
• wherein the inter-gate insulation region comprises at least two different materials,
• wherein the first gate insulation layer and the second gate insulation layer are spaced apart from each other in the second direction, and the inter-gate insulation region is between the first gate insulation layer and the second gate insulation layer in the second direction, and
• wherein the inter-gate insulation region comprises an air space.

An integrated circuit device, comprising:

• a plurality of active regions formed on a substrate and extending in a first direction;
• a first gate line and a second gate line formed on the substrate, extending in a straight line in a second direction and crossing the plurality of active regions, wherein the first gate line and the second gate line are spaced apart from each other;
• a first gate insulation layer extending in the second direction and covering a first surface of the first gate line facing a portion of the plurality of active regions, while not covering a first short-axis sidewall of the first gate line facing the second gate line;
• a second gate insulation layer extending in the second direction and covering a second surface of the second gate line facing another portion of the plurality of active regions, while not covering a second short-axis sidewall of the second gate line facing the first gate line;
• and
• an inter-gate insulation region interposed between the first gate line and the second gate line and abutting the first short-axis sidewall and the second short-axis sidewall,
• wherein the inter-gate insulation region comprises at least two different materials,
• wherein the inter-gate insulation region comprises a silicon oxide and a silicon nitride, and further comprises air space.