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US 10,651,166 B2Granted
E-fuse cells
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorsHandoko Linewih, Chien-Hsin Lee
Life of this patent
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Abstract
E-fuse cells and methods for protecting e-fuses are provided. An exemplary e-fuse cell includes an e-fuse having a first end coupled to a source node and a second end selectively coupled to a ground. Further, the exemplary e-fuse includes a selectively activated shunt path from the source node to the ground. Also, the exemplary e-fuse includes a device for activating the shunt path in response to an electrical overstress event.
Claims4
An e-fuse cell comprising:
- an e-fuse having a first end coupled to a source node and a second end selectively coupled to a ground;
- a selectively activated shunt path from the source node to the ground, wherein the e-fuse is not located between the source node and the ground on the shunt path;
- a device for activating the shunt path in response to an electrical overstress event;
- a PNP bipolar junction transistor in the shunt path and having an emitter coupled to the source node, a collector coupled to the ground, and a base;
- and
- a logic field effect transistor having a source coupled to the base of the PNP bipolar junction transistor, a drain coupled to the ground, and a gate,
- wherein the device for activating the shunt path in response to the electrical overstress event is coupled to the gate of the logic field effect transistor.
4 more elements
An e-fuse cell comprising:
- an e-fuse having a first end coupled to a source node and a second end selectively coupled to a ground;
- a selectively activated shunt path from the source node to the ground, wherein the e-fuse is not located on shunt path between the source node and the ground;
- a diode connected to the source node and the ground in parallel to the e-fuse to inhibit negative current flow across the e-fuse;
- a device for activating the shunt path in response to an electrical overstress event;
- a PNP bipolar junction transistor in the shunt path and having an emitter coupled to the source node, a collector coupled to the ground, and a base;
- and
- a logic field effect transistor having a source coupled to the base of the PNP bipolar junction transistor, a drain coupled to the ground, and a gate, wherein the device for activating the shunt path in response to the electrical overstress event is coupled to the gate of the logic field effect transistor.
4 more elements
Dependencies are inferred from the claim text.