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US 10,651,154 B2Granted
Semiconductor packages
AssigneeSamsung Electronics Co., Ltd.
InventorsSang-Sick Park, Geol Nam, Tae Hong Min, Jihwan Hwang
Life of this patent
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Abstract
A semiconductor package includes a plurality of semiconductor chips on a substrate. The semiconductor chips include a first semiconductor chip, a second semiconductor chip, and a third semiconductor chip that are sequentially stacked on the substrate. The semiconductor package further includes a plurality of non-conductive layers between the substrate and the first semiconductor chip and between adjacent semiconductor chips among the semiconductor chips. The semiconductor chips include smaller widths as a distance from the substrate increases. Each of the non-conductive layers includes an extension protruding outward from a side surface of an overlying one of the semiconductor chips.
Claims20
A semiconductor package comprising:
- a substrate including a plurality of vias;
- a first semiconductor chip and a second semiconductor chip sequentially stacked on the substrate;
- a first non-conductive layer between the substrate and the first semiconductor chip, the first non-conductive layer protruding outside of the first semiconductor chip;
- a second non-conductive layer between the first semiconductor chip and the second semiconductor chip, the second non-conductive layer protruding outside of the second semiconductor chip;
- and
- a mold layer on the substrate surrounding the first semiconductor chip and the second semiconductor chip, wherein
- a width of the first semiconductor chip is greater than a width of the second semiconductor chip and less than a width of the substrate,
- the first non-conductive layer includes a first extension that protrudes outward from a side surface of the first semiconductor chip overlying the first non-conductive layer,
- the first extension is spaced apart from the second semiconductor chip while extending along the side surface of the first semiconductor chip to protrude over and above a top surface of the first semiconductor chip and having a portion extending in a vertical direction above a bottom surface of the second semiconductor chip,
- a material of the first non-conductive layer is the same as that of the second non-conductive layer.
7 more elements
A semiconductor package comprising:
- a substrate;
- a first semiconductor chip and a second semiconductor chip sequentially stacked on the substrate, the first semiconductor chip and the second semiconductor chip include a plurality of vias;
- a first non-conductive layer between the substrate and the first semiconductor chip, the first non-conductive layer protrudes outside of the first semiconductor chip, the first non-conductive layer includes a first extension that protrudes outward from a side surface of the first semiconductor chip overlying the first non-conductive layer;
- a second non-conductive layer between the first semiconductor chip and the second semiconductor chip, the second non-conductive layer protrudes outside of the second semiconductor chip;
- and
- a mold layer on the substrate surrounding the first semiconductor chip and the second semiconductor chip, wherein
- a width of the first semiconductor chip being greater than a width of the second semiconductor chip and less than a width of the substrate,
- the first non-conductive layer has an uppermost end higher than a bottom surface of the second semiconductor chip and increases in thickness to the uppermost end from a point of contact with both an edge of the first semiconductor chip and the second non-conductive layer,
- the second non-conductive layer has an uppermost end higher than a top surface of the second semiconductor chip,
- the first non-conductive layer is spaced apart from a side surface of the second semiconductor chip,
- the first non-conductive layer fully covers and extends along the side surface of the first semiconductor chip, and
- the second non-conductive layer fully covers the side surface of the second semiconductor chip, and
- the first extension is spaced apart from the second semiconductor chip.
10 more elements
A semiconductor package comprising:
- a substrate;
- a first semiconductor chip and a second semiconductor chip sequentially stacked on the substrate;
- a first non-conductive layer between the substrate and the first semiconductor chip, the first non-conductive layer protruding outside of the first semiconductor chip, the first non-conductive layer including a first extension that protrudes outward from a side surface of the first semiconductor chip overlying the first non-conductive layer;
- and
- a second non-conductive layer between the first semiconductor chip and the second semiconductor chip, the second non-conductive layer contacting the first semiconductor chip and the second semiconductor chip, the second non-conductive layer protruding outside of the second semiconductor chip, wherein
- a width of the first semiconductor chip is greater than a width of the second semiconductor chip and less than a width of the substrate,
- the first non-conductive layer has an uppermost end higher than a bottom surface of the second semiconductor chip and increases in thickness to the uppermost end, the increase in thickness beginning from a point of contact between the first non-conductive layer and a corner point of the first semiconductor chip,
- the first non-conductive layer is spaced apart from a side surface of the second semiconductor chip,
- the first non-conductive layer fully covers and extends along the side surface of the first semiconductor chip, and
- the second non-conductive layer fully covers the side surface of the second semiconductor chip, and
- the first extension is spaced apart from the second semiconductor chip.
8 more elements
Dependencies are inferred from the claim text.