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US 10,651,151 B2Granted
3D integration using Al—Ge eutectic bond interconnect
AssigneeInvenSense, Inc.
InventorsPeter Smeys, Mozafar Maghsoudnia
Life of this patent
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Abstract
A method includes aligning a germanium feature on a first CMOS wafer with an aluminum feature on a second CMOS wafer. The aluminum feature and the germanium feature are pressed together. A eutectic bond is formed connecting the aluminum feature to the germanium feature. The eutectic bond has a melting point which is lower than the melting point of aluminum and the melting point of germanium.
Claims18
A method comprising:
- aligning a germanium feature on a first CMOS wafer with an aluminum feature on a second CMOS wafer;
- heating the aluminum feature and the germanium feature to a point below the melting point of a eutectic bond, wherein the aluminum feature is a well within a passivation layer;
- pressing together the aluminum feature and the germanium feature;
- after the pressing, heating the aluminum feature and the germanium feature to at least the melting point of the eutectic bond;
- forming a eutectic bond connecting the aluminum feature to the germanium feature, wherein the eutectic bond has a melting point which is lower than a melting point of aluminum and a melting point of germanium;
- and
- providing an electrical connection from the first CMOS wafer to a solder bump through the eutectic bond, and through a silicon via in the second CMOS wafer.
4 more elements
A method comprising:
- aligning a germanium feature on a first CMOS wafer with an aluminum feature on a second CMOS wafer, wherein
- the second CMOS wafer includes a depression within a surface of the second CMOS wafer, and
- the depression includes the aluminum feature;
- pressing together the aluminum feature and the germanium feature;
- forming a eutectic bond connecting the aluminum feature to the germanium feature, wherein the eutectic bond has a melting point which is lower than a melting point of aluminum and a melting point of germanium;
- and
- providing an electrical connection from the first CMOS wafer to a solder bump through the eutectic bond, and through a silicon via in the second CMOS wafer.
4 more elements
A method comprising:
- aligning a first feature on a first CMOS wafer with a second feature on a second CMOS wafer, wherein
- the first feature is a standoff with a height,
- the second feature is a depression with a depth, and
- the height is greater than the depth;
- pressing together the first feature and the second feature;
- forming a eutectic bond connecting the first feature to the second feature, wherein the eutectic bond has a melting point which is lower than a melting point of the first feature and a melting point of the second feature;
- and
- providing an electrical connection from the first CMOS wafer to a solder bump through the eutectic bond, and through a silicon via in the second CMOS wafer.
5 more elements
Dependencies are inferred from the claim text.