US 10,651,136 B2 · Technique for decoupling plasma antennae from actual circuitry

Abstract

When forming semiconductor devices, plasma-induced damage may be prevented or restricted by providing a conductive path between critical areas and the substrate of the semiconductor device. According to the present disclosure, a negative effect of any such protective structures on the performance of the semiconductor device may be significantly reduced by permanently interrupting the corresponding electrical connection at any appropriate point in time of the manufacturing sequence. Furthermore, respective fuse structures acting as current-sensitive areas may also be implemented in test structures in order to evaluate plasma-induced currents, thereby providing a possibility for a more efficient design of respective protective structures and/or for contributing to superior process control of critical plasma treatments.

Claims19

Dependent claims

A semiconductor device, comprising:

a charge accumulation structure, wherein said charge accumulation structure comprises at least one of a gate electrode structure, a drain region and a source region of a transistor element;
a first fuse structure having a first end and a second end, said first end of said first fuse structure being electrically connected to said charge accumulation structure;
a second fuse structure having a first end and a second end, said first end of said second fuse structure being electrically connected to said charge accumulation structure;
and
a discharge structure electrically connected to said second end of said first fuse structure.

2 more elements

Dependencies are inferred from the claim text.

Technique for decoupling plasma antennae from actual circuitry

Life of this patent

Technique for decoupling plasma antennae from actual circuitry

Life of this patent

Abstract

Claims19