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US 10,651,134 B2Granted
Wafer level integration including design/co-design, structure process, equipment stress management and thermal management
AssigneeInternational Business Machines Corporation
InventorsJeffrey Gelorme, Li-Wen Hung, John U. Knickerbocker
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Abstract
A method of manufacturing a multi-layer wafer is provided. At least one stress compensating polymer layer is applied to at least one of two heterogeneous wafers. The stress compensating polymer layer is low temperature bonded to the other of the two heterogeneous wafers to form a multi-layer wafer pair. Channels are created between die on at least one of the two heterogeneous wafers. The channels are back filled with one of oxide or polymer to create a channel oxide deposition.
Claims13
A method of manufacturing a multi-layer wafer comprising:
- applying at least one stress compensating polymer layer to at least one of two heterogeneous wafers;
- low temperature bonding the two heterogeneous wafers to bond the stress compensating polymer layer to the other of the two heterogeneous wafers to form a multi-layer wafer pair;
- creating channels between die on at least one of the two heterogeneous wafers;
- and
- back filling the channels with one of oxide or polymer to create a channel oxide deposition.
2 more elements
Dependencies are inferred from the claim text.