High density antifuse co-integrated with vertical FET
AssigneeInternational Business Machines Corporation
InventorsAlexander Reznicek, Pouya Hashemi, Miaomiao Wang, Takashi Ando
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Abstract
A semiconductor device comprising an anti-fuse is disclosed. The semiconductor anti-fuse includes a highly doped source of a first conductivity type overlying a substrate. The semiconductor anti-fuse further includes a counter-doped layer of a second conductivity type arranged between the highly doped source and the substrate. The semiconductor anti-fuse further includes a highly doped fuse region extending over the highly doped source and comprising an epitaxial growth, the highly doped fuse region implanted with ions.
Claims8
A method for manufacturing a vertical transistor co-integrated with an anti-fuse, comprising:
- forming a highly doped source of a first conductivity type overlying a substrate;
- forming a counter-doped layer of a second conductivity type arranged between the highly doped source and the substrate;
- forming a first channel region extending over the highly doped source and comprising an epitaxial growth, the first channel region located at a first location on the substrate and having a first width;
- forming a drain comprising an epitaxial growth arranged on the first channel region, the first channel region extending from the highly doped source to the drain;
- and
- forming a highly doped fuse region extending over the highly doped source and comprising an epitaxial growth, the highly doped fuse region located at a second location on the substrate and having a second width that is larger than the first width.
Dependencies are inferred from the claim text.