Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufactuing Company, Ltd.
InventorsJeng Chang Her, Cha-Hsin Chao, Yi-Wei Chiu, Li-Te Hsu, Ying Ting Hsia
Life of this patent
Estimating the term…
Abstract
In a method for manufacturing a semiconductor device, a first interlayer dielectric layer is formed over a substrate. First recesses are formed in the first interlayer dielectric layer. First metal wirings are formed in the first recesses. A first etch-resistance layer is formed in a surface of the first interlayer dielectric layer between the first metal wirings but not on upper surfaces of the first metal wirings. A first insulating layer is formed on the first etch-resistance layer and the upper surfaces of the first metal wirings.
Claims20
A method for manufacturing a semiconductor device, comprising:
- forming a first interlayer dielectric layer over a substrate;
- forming a first etch-resistance layer in a surface of the first interlayer dielectric layer;
- forming first recesses in the first interlayer dielectric layer and the first etch-resistance layer;
- forming first metal wirings in the first recesses;
- and
- forming a first insulating layer on the first etch-resistance layer and the upper surfaces of the first metal wirings,
- wherein the forming the first etch-resistance layer comprises introducing one or more selected from the group consisting of Si, C, B, P, As and Ge into the first interlayer dielectric layer.
A method for manufacturing a semiconductor device, comprising:
- forming a first interlayer dielectric layer over a substrate;
- forming a first etch-resistance layer in a surface of the first interlayer dielectric layer;
- forming first recesses in the first interlayer dielectric layer and the first etch-resistance layer;
- forming first metal wirings in the first recesses;
- and
- forming a first insulating layer on the first etch-resistance layer and the upper surfaces of the first metal wirings,
- wherein the forming the first etch-resistance layer comprises introducing one or more of Si, C, N, B, P, As and Ge into the first interlayer dielectric layer by an ion implantation method, or introducing one or more of Si, C, B, P, As and Ge into the first interlayer dielectric layer by using plasma radiation.
A method for manufacturing a semiconductor device, comprising:
- forming a first interlayer dielectric layer over a substrate;
- forming a first etch-resistance layer in a surface of the first interlayer dielectric layer;
- forming first recesses in the first interlayer dielectric layer and the first etch-resistance layer;
- forming first metal wirings in the first recesses;
- forming a first insulating layer on the first etch-resistance layer and the upper surfaces of the first metal wirings;
- forming a second interlayer dielectric layer on the first insulating layer;
- forming second recesses in the second interlayer dielectric layer so that the upper surfaces of the first metal wirings are exposed;
- and
- forming second metal wirings in the second recesses,
- wherein the forming the first etch-resistance layer comprises introducing one or more of Si, C, N, B, P, As and Ge into the first interlayer dielectric layer by an ion implantation method, or introducing one or more of Si, C, B, P, As and Ge into the first interlayer dielectric layer by using plasma radiation.
Dependencies are inferred from the claim text.